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CMOS Neurotransmitter Microarray: 96-Channel Integrated Potentiostat With On-Die Microsensors
2013
IEEE Transactions on Biomedical Circuits and Systems
Preserved Fulltext
By combining the current-to-frequency and the single-slope analog-to-digital converter (ADC) architectures a total linear dynamic range of 95 dB is achieved. ...
A 8 12 array of integrated potentiostats for on-CMOS neurotransmitter imaging is presented. ...
ACKNOWLEDGMENT The authors would like to thank Canadian Microelectronics Corporation (CMC) for providing the fabrication services and microsystem integration services. ...
doi:10.1109/tbcas.2012.2203597
pmid:23853333
fatcat:xy33aerfofcn3ho74f4yiow5pe
The PRO1 ASIC for fast Wilkinson encoding
2008
Journal of Instrumentation
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2008 pre-print arXiv:0809.0543v1 fatcat:y64fc3gewfcrjjaedccdkb5bzaOther Versions
However such Analog-to-Digital conversions are relatively slow, limited by the encoder clock speed. ...
For 8-10 bits of resolution, this technique is compact and requires far fewer system resources. ...
This requirement places a premium on analog conversion performance. ...
doi:10.1088/1748-0221/3/12/p12003
fatcat:xjffo7tpczbhrjcxh3wqehg4ci
2019 Index IEEE Journal of Solid-State Circuits Vol. 54
2019
IEEE Journal of Solid-State Circuits
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Cai, Y., +, JSSC Feb. 2019 550-559 CMOS analog integrated circuits A 1-mW Class-AB Amplifier With −101 dB THD+N for High-Fidelity 16 X Headphones in 65-nm CMOS. ...
., +, JSSC May 2019 1254-1265 A 31-nW, 148-fs Step, 9-bit Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter in 28-nm CMOS. ...
doi:10.1109/jssc.2019.2956675
fatcat:laiuae7dtragjijttgfatsldmu
A Fully-Differential Switched-Capacitor Dual-Slope Capacitance-To-Digital Converter (CDC) for a Capacitive Pressure Sensor
2019
Sensors
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This article focuses on a proposed Switched-Capacitor Dual-Slope based CDC. Special attention is paid to the measurement setup using a real pressure sensor. ...
Based on that, an ambient air pressure sensor model for SPICE (Simulation-Program-with-Integrated-Circuit-Emphasis) circuit simulators is presented. ...
(b) Centered
A Switched-Capacitor Noise-Shaping Dual-Slope direct CDC To read out the pressure sensor, a dedicated ASIC (Application Specific Integrated Circuit) must be developed. ...
doi:10.3390/s19173673
fatcat:nwpgfsem45btrminikftdsto3a
Sub- $\mu$ Vrms-Noise Sub- $\mu$ W/Channel ADC-Direct Neural Recording With 200-mV/ms Transient Recovery Through Predictive Digital Autoranging
2018
IEEE Journal of Solid-State Circuits
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Each recording channel features a hybrid analog-digital second-order oversampling analog-to-digital converter (ADC), with the biopotential signal coupling directly to the second integrator for high conversion ...
The integrated ADC-direct neural recording offers record figureof-merit with a noise efficiency factor (NEF) of the combined front end and ADC of 1.81, and a corresponding power efficiency factor (PEF) ...
Fig. 2(d) , digitally predicting the analog input at 12-bit resolution from a single-bit quantization of the continuously integrated residue at effective 32 OSR.
III. ...
doi:10.1109/jssc.2018.2870555
fatcat:yby4oxrldraurogwpildnib2za
Laser driving and data processing concept for mobile trace gas sensing: Design and implementation
2018
Review of Scientific Instruments
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The same SoC is used to sample the spectroscopic signal at rates up to 125 MS/s with 14-bit resolution. ...
Thus, we demonstrate how a cost-effective, compact, and commercial SoC can successfully be adapted to obtain a fully operational researchgrade laser spectrometer. ...
We thank Curdin Flepp for his great engagement in the development of the I 2 C functionalities to control the custom-built ADCs, DACs, and the IO-expander. ...
doi:10.1063/1.5026546
pmid:29960583
fatcat:2qx43cpg3vgdpaqd5nhrundq6i
Power-Efficiency Evolution of Capacitive Sensor Interfaces
2020
IEEE Sensors Journal
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This paper reviews the architectural and circuit innovations that have contributed to this progress. ...
To achieve higher resolution, they can also be employed as the front-end in a hybrid architecture, where a back-end based on ΔΣ modulation or a voltage-controlled oscillator (VCO) performs a fine measurement ...
A simple criterion to determine whether the interface is based on a capacitance-to-analog conversion followed by an analog-to-digital conversion, or is based on a direct capacitance-to-digital conversion ...
doi:10.1109/jsen.2020.3035109
fatcat:igoahuhw6rcm5kgpz2fq7a7xd4
2020 Index IEEE Journal of Solid-State Circuits Vol. 55
2020
IEEE Journal of Solid-State Circuits
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, P., JSSC Feb. 2020 282-297 Jahromi, S., Jansson, J., Keranen, P., and Kostamovaara, J., A 32 × 128 SPAD-257 TDC Receiver IC for Pulsed TOF Solid-State 3-D Imaging; JSSC July 2020 1960-1970, see Qi ...
., A Low-Power 70-100-GHz Mixer-First RX Leveraging Frequency-Translational Feedback; JSSC Aug. 2020 2043-2054 Ishigaki, Y., see Yamada, Y., JSSC Jan. 2020 120-132 Ishii, H., see Kondo, S., 2866-2877 ...
Lee, J., +, JSSC Dec. 2020
3400-3413
CMOS analog integrated circuits
A 20-GHz 1.9-mW LNA Using g m -Boost and Current-Reuse Techniques in
65-nm CMOS for Satellite Communications. ...
doi:10.1109/jssc.2021.3054535
fatcat:rfm7shuowvakfgzumgtqzlod5i
Guest Editorial Selected Papers from the 2021 IEEE International Solid-State Circuits Conference
2021
IEEE Transactions on Biomedical Circuits and Systems
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She is CSO at Sensium Healthcare where she is responsible for delivering biomedical and advanced technology research programs related to very-low-power wireless monitoring. ...
Committee for the IEEE International Solid-State Circuits Conference (ISSCC) including European Regional Chair (2013-2015) and Technical Program Chair (2018). ...
This LDC applies a high-resolution dual-slope quantizer for data conversion, while an auxiliary noise-shaping loop is used to shape the residual quantization noise. ...
doi:10.1109/tbcas.2021.3137037
fatcat:asnzh2sdprcetjs4efaijgm2fq
Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs
2019
IEICE transactions on electronics
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This paper aims to provide a summary on the advancement of VCObased ΔΣ ADCs. ...
The scope of this paper includes the basics and motivations behind the VCO-based ADCs, followed by a survey covering a wide range of architectures and circuit techniques in both continuous-time (CT) and ...
Among these efforts comes a promising direction of time-domain (TD) analog signal processing. ...
doi:10.1587/transele.2018cti0001
fatcat:nonxkbob5rc57iw4af4psapv7e
2020 Index IEEE Transactions on Circuits and Systems I: Regular Papers Vol. 67
2020
IEEE Transactions on Circuits and Systems Part 1: Regular Papers
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., +, TCSI
April 2020 1296-1308
Digital-analog conversion
A 10.7b 300MS/s Two-Step Digital-Slope ADC in 65nm CMOS. ...
., +, TCSI June 2020 1857-1866 An 8-bit Low-Cost String DAC With Gradient Errors Suppression to Achieve 16-bit Linearity. ...
., +, TCSI Dec. 2020 4295-4308 Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits -Application to Voltage-Controlled Ring Oscillators and Frequency-Based ΣΔ ADCs. ...
doi:10.1109/tcsi.2021.3055003
fatcat:kbmst5td2bbvtl7vpbj3knnkri
Progress in Data Acquisition of Wearable Sensors
2022
Biosensors
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Data acquisition is extremely important for wearable sensors, including modules of probes, signal conditioning, and analog-to-digital conversion. ...
mainstream analog-to-digital conversion strategies. ...
The dual-slope ADC owns high conversion accuracy and can achieve a high-quality analog-to-digital conversion by using a long conversion time under the condition of a low sampling rate. ...
doi:10.3390/bios12100889
fatcat:lr724qtvzrgsfnevqutm7yxwwe
An Asynchronous Sampling-Based 128 $\times$ 128 Direct Photon-Counting X-Ray Image Detector with Multi-Energy Discrimination and High Spatial Resolution
2013
IEEE Journal of Solid-State Circuits
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This paper presents a direct photon-counting X-ray image detector with a photoconductor for high-quality medical imaging applications. ...
Three 15-bit counters in each pixel count up energy-discriminated photons for the reconstruction of multispectral X-ray images. ...
For settling to within a 0.25% accuracy, has only to be less than , where is the Fig. 16 . Pixel-data readout architecture using the column data bus. one-step conversion time of the SAL ADC. ...
doi:10.1109/jssc.2012.2221196
fatcat:oq7ysqqmebcslat6tlbmk6qowm
2018 Index IEEE Transactions on Circuits and Systems I: Regular Papers Vol. 65
2018
IEEE Transactions on Circuits and Systems Part 1: Regular Papers
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Reset-Free Memoryless Delta-Sigma Analog-to-Digital Conversion. ...
., +, TCSI June 2018 1775-1784 Non-Uniform Wavelet Sampling for RF Analog-to-Information Conversion. ...
doi:10.1109/tcsi.2019.2896877
fatcat:3lzpngw2ofdjhiculf7ehrjeam
A 2 kfps Sub-µW/Pix Uncooled-PbSe Digital Imager With 10 Bit DR Adjustment and FPN Correction for High-Speed and Low-Cost MWIR Applications
2015
IEEE Journal of Solid-State Circuits
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integrated circuit (ROIC) to operate the MWIR imager. ...
This work fills the gap by presenting a monolithic uncooled high-speed imager based on vapor-phase deposition lead selenide (VPD PbSe) photoconductors and a fully digital and configurable CMOS read-out ...
Layout is compacted to a pitch of 135 µm for a low-cost 0.35 µm 2P4M CMOS technology. ...
doi:10.1109/jssc.2015.2464672
fatcat:v7p24jmfh5flxjihhniuvjwvky
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