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On signal tracing in post-silicon validation
2010
2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)
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It is increasingly difficult to guarantee the first silicon success for complex integrated circuit (IC) designs. Post-silicon validation has thus become an essential step in the IC design flow. ...
Tracing internal signals during circuit's normal operation, being able to provide real-time visibility to the circuit under debug (CUD), is one of the most effective silicon debug techniques and has gained ...
Since time-to-market dictates the success of a chip, post-silicon validation techniques that help identifying bugs effectively and efficiently is of crucial importance. ...
doi:10.1109/aspdac.2010.5419883
dblp:conf/aspdac/XuL10
fatcat:5ftlnjsgmbf6ro5vvlufbfvnhq
Scalable trace signal selection using machine learning
2013
2013 IEEE 31st International Conference on Computer Design (ICCD)
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A key problem in post-silicon validation is to identify a small set of traceable signals that are effective for debug during silicon execution. ...
In contrast, simulation-based selection techniques provide superior restorability but incur significant computation overhead. ...
Success in post-silicon validation and debug crucially depends on effective signal selection that makes effective use of the limited available observability. ...
doi:10.1109/iccd.2013.6657069
dblp:conf/iccd/RahmaniMR13
fatcat:qpqvw4dozfd5dchy2qvs5ovyvu
Efficient trace signal selection using augmentation and ILP techniques
2014
Fifteenth International Symposium on Quality Electronic Design
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A key problem in post-silicon validation is to identify a small set of traceable signals that are effective for debug during silicon execution. ...
Most signal selection techniques rely on a metric based on circuit structure. Simulation-based signal selection is promising but have major drawbacks in computation overhead and restoration quality. ...
A fundamental challenge in post-silicon validation is limited observability and controllability. ...
doi:10.1109/isqed.2014.6783318
dblp:conf/isqed/RahmaniMR14
fatcat:s4k4medfqjdutbypabqdo2s4gm
Efficient Trace Signal Selection for Post Silicon Validation and Debug
2011
2011 24th Internatioal Conference on VLSI Design
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Post-silicon validation is an essential part of modern integrated circuit design to capture bugs and design errors that escape pre-silicon validation phase. ...
A major problem governing post-silicon debug is the observability of internal signals since the chip has already been manufactured. ...
Post-silicon validation techniques are used to capture these escaped bugs. Post-silicon debug comprises of signal observation and analysis. ...
doi:10.1109/vlsid.2011.14
dblp:conf/vlsid/BasuM11
fatcat:6ikf3djpw5gwrpnymiwbe5rizm
Trace signal selection for visibility enhancement in post-silicon validation
2009
2009 Design, Automation & Test in Europe Conference & Exhibition
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This paper proposes an automated trace signal selection strategy that is able to dramatically enhance the visibility in post-silicon validation. ...
Today's complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from presilicon verification. ...
Acknowledgements This work was supported in part by the General Research ...
doi:10.1109/date.2009.5090872
dblp:conf/date/LiuX09
fatcat:hauzr6yh7bctfkz7ms5t2oiq5u
RATS: Restoration-Aware Trace Signal Selection for Post-Silicon Validation
2013
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
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Post-silicon validation is one of the most important and expensive tasks in modern integrated circuit design methodology. ...
The primary problem governing post-silicon validation is the limited observability due to storage of a small number of signals in a trace buffer. ...
Some other signals could have been selected for better restoration performance.
VII. CONCLUSION Post-silicon validation is extremely complex and time consuming in IC design methodology. ...
doi:10.1109/tvlsi.2012.2192457
fatcat:67knceky65dyzh45tku4ozwvfe
Topological Ordering Signal Selection Technique for Internet of Things based on Combinational Gate for Visibility Enhancement
2020
Scalable Computing : Practice and Experience
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This shrinking market reduces the design automation validation process. Signal selection is the most effective and challenging technique in post-silicon validation and debug. ...
This tends to select the signals prudently in order to maximize the state reconstruction. To identify the trace signals, signal restoration is the extensive metric that has been used so far. ...
This helps to decide which signal are to be traced in an automatic manner to increase the rate of post-silicon validation part. ...
doi:10.12694/scpe.v21i1.1607
fatcat:gr5cgtbmyjdprnzifeup4qft2u
Post-silicon validation opportunities, challenges and recent advances
2010
Proceedings of the 47th Design Automation Conference on - DAC '10
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Post-silicon validation is used to detect and fix bugs in integrated circuits and systems after manufacture. ...
In this paper, we provide an overview of the post-silicon validation problem and how it differs from traditional pre-silicon verification and manufacturing testing. ...
Acknowledgment This work is supported in part by the Semiconductor Research Corporation (SRC), the Gigascale Systems Research Center, one of six research centers funded under the Focus Center Research ...
doi:10.1145/1837274.1837280
dblp:conf/dac/MitraSN10
fatcat:hwycqj5eljfxbnszwn3zn5yjmy
Intel's Post Silicon functional validation approach
2007
2007 IEEE International High Level Design Validation and Test Workshop
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Post silicon validation is the final process in semiconductor chip manufacturing. Functional Validation (FV) is one among many methods used in post silicon validation. ...
In this paper we tried to explain how this post silicon functional validation is performed in the industry level. ...
Threadmill: A post-silicon and Hishm Ashraf of STMicroelectronics for their exerciser for multi-threaded processors. InDesign immense contribution to this paper. ...
doi:10.1109/hldvt.2007.4392786
dblp:conf/hldvt/BojanFM07
fatcat:ygexaxoke5fwtl756u6jq4eulu
Bridging pre- and post-silicon debugging with BiPeD
2012
Proceedings of the International Conference on Computer-Aided Design - ICCAD '12
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Furthermore, pre-silicon verification and post-silicon validation methodologies are very different and share little information between them. ...
In post-silicon, this knowledge is used to detect errors by means of a reconfigurable hardware unit. ...
Post-silicon validation operates at full speed on early silicon prototypes, but is plagued by the difficulty of observing internal signals. ...
doi:10.1145/2429384.2429403
dblp:conf/iccad/DeOrioLB12
fatcat:cdunae6j6rbspgiqi4rj2pcqzi
A novel simulation based approach for trace signal selection in silicon debug
2016
2016 IEEE 34th International Conference on Computer Design (ICCD)
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The major roadblock in post-silicon functional verification is limited observability of internal signals in a design. A possible solution to address this ...
With the fabrication technology fast approaching 7nm, Post-silicon validation has become an integral part of integrated circuit design to capture and eliminate functional bugs that escape pre-silicon validation ...
Post Silicon Validation Post silicon validation is the process of operating the manufactured chips in their actual environment to find out if they are operating according to their specification. ...
doi:10.1109/iccd.2016.7753280
dblp:conf/iccd/KomariV16
fatcat:nbnuzfchhnamdfrmz2psvfqvva
Simulation-based signal selection for state restoration in silicon debug
2011
2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
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The most critical roadblock in post-silicon validation is the limited observability of internal signals of a design, since this aspect hinders the ability to diagnose detected bugs. ...
Thus, the selection of which signals to trace is of paramount importance in post-silicon debugging and diagnosis. ...
Improving the Restoration Capacity Metric A good restoration capacity metric should have a high degree of correlation with the actual SRR in the post-silicon post-analysis, since the more accurate the ...
doi:10.1109/iccad.2011.6105391
dblp:conf/iccad/ChatterjeeMB11
fatcat:kk7joxhubfc5hizwxd7zwdw5ja
Emphasizing Functional Relevance Over State Restoration in Post-silicon Signal Tracing
2018
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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We present an algorithm, based on PageRank [PageRank on Netlist (PRoN)], for post-silicon trace signal selection. PageRank is not designed to maximize SRR and is applied to the circuit netlist. ...
In this paper, we establish that SRR is intrinsically unsuitable as a metric for evaluating trace signal quality, as it captures neither the higher-level functionality of the design nor the constraints ...
These include trace analysis-based SoC protocol debug [14] , [38] , post-silicon validation and trace signal selection via bitflip detection [34] , [35] , post-silicon bug localization, and validation ...
doi:10.1109/tcad.2018.2887047
fatcat:g655w2zr4jfaban5n7fge6rogm
Dynamic Selection of Trace Signals for Post-Silicon Debug
2013
2013 14th International Workshop on Microprocessor Test and Verification
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Post-silicon validation is one of the most expensive and complex tasks in today's System-on-Chip (SoC) design methodology. ...
A major challenge in post-silicon debug is limited observability of the internal signals. Existing approaches address this issue by selecting a small set of useful signals. ...
These will be referred to as uart, one and slave, respectively for further discussion in this section. ...
doi:10.1109/mtv.2013.13
dblp:conf/mtv/BasuMPNA13
fatcat:e4mjrqvjmbajrcqhf76g4e3ody
Trace signal selection to enhance timing and logic visibility in post-silicon validation
2010
2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
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Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-silicon validation. ...
In this work we first propose two improvements to existing "signal selection" algorithms to further increase the logic restorability inside the chip. ...
INTRODUCTION Post-silicon validation of VLSI chips has become significantly time-consuming in nanometer technologies and impacting the product time-to-market. ...
doi:10.1109/iccad.2010.5654123
dblp:conf/iccad/ShojaeiD10
fatcat:tllr7dv5wfcztlfqqso2skmfta
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