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Battery-Aware Task Mapping for Coarse-Grained Reconfigurable Architecture
2013
IEICE transactions on information and systems
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Coarse-grained Reconfigurable Architecture (CGRA) is a parallel computing platform that provides both high performance of hardware and high flexibility of software. ...
In this paper, we propose a battery-aware task-mapping method to optimize energy consumption and improve battery lifetime. ...
Introduction Coarse-grained Reconfigurable Architecture (CGRA) is a kind of parallel computing platform combining high performance of hardware and high flexibility of software. ...
doi:10.1587/transinf.e96.d.2524
fatcat:f4i4ybpehvhcrkcp633pqip3gq
A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead
2006
Proceedings 20th IEEE International Parallel & Distributed Processing Symposium
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To take advantages of this hierarchy we have developed a configuration mapping algorithm and we have integrated it in our reconfiguration manager. ...
Currently run-time reconfigurable hardware offers really attractive features for embedded systems, such as flexibility, reusability, high performance and, in some cases, low-power consumption. ...
And this is also true for fine-grain [2] and coarse-grain [15] reconfigurable architectures, as long as frequent reconfigurations are demanded. ...
doi:10.1109/ipdps.2006.1639435
dblp:conf/ipps/RamoRMC06
fatcat:xgzuv5ihozhx3lpo37hw3rjlcu
A Survey on Reconfigurable System-on-Chips
2018
REV Journal on Electronics and Communications
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comparison with the conventional architectures. ...
This paper analyzes and emphasizes the key research trends of the reconfigurable System-on-Chips (SoCs). Firstly, the emerging hardware architecture of SoCs is highlighted. ...
Reconfigurable Processing Farbics The reconfigurable hardware architecture is generally classified into fine-grained reconfigurable architecture such as the Field Programmable Gate Array (FPGA) and coarse-grained ...
doi:10.21553/rev-jec.147
fatcat:zqjzktktbjh4los7luipp45cvy
FPGA Implementation of On-Chip Network
2018
DJ Journal of Advances in Electronics and Communication Engineering
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Coarse grained architecture is suggested due to its innumerable advantages over fine grained architecture. ...
Coarse Grained Arrays (CGAs) with run-time re-configurability play a challenging task to design Network on-Chip (NoC) communication systems satisfying the power and area of embedded system. ...
[6]
Grigorios Dimitroulakos, Stavros
Georgiopoulos, Michalis D.Galanis
and Costas E.Goutis, Resource Aware
Mapping
on
Coarse
Grained
Reconfigurable
Arrays,
Microprocessors and Microsystems, ...
doi:10.18831/djece.org/2018021001
fatcat:jfgj5g733zbi5mgkfypfzvn6ga
Cross-layer design of reconfigurable cyber-physical systems
2017
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017
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To answer the current lack of a comprehensive modeling strategy for heterogeneous CPS, CER-BERO intends to implement a component-oriented approach, with dedicated model-to-model mapping and synchronization ...
II-B, respectively, contribute to determine the CERBERO continuous design and operational framework for highly interconnected systems presented in Sect. II-C. A. ...
Coarse-Grained Reconfiguration and DPR on FPGA. specialized according to the use-case peculiarities. ...
doi:10.23919/date.2017.7927088
dblp:conf/date/MasinPMFPPRRSTT17
fatcat:tsn66di7ozaarnxyttbtne4oji
System-level power-performance tradeoffs for reconfigurable computing
2006
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
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In this paper, we propose a configuration-aware datapartitioning approach for reconfigurable computing. We show how the reconfiguration overhead impacts the data-partitioning process. ...
Moreover, we explore the system-level power-performance tradeoffs available when implementing streaming embedded applications on fine-grained reconfigurable architectures. ...
However, the paper only considers statically configurable logic and does not consider dynamically reconfigurable architectures. A different approach for coarse-grained RC is presented in [18] . ...
doi:10.1109/tvlsi.2006.878343
fatcat:2blfbpudnbf7zdhc67uele3fai
Autonomic management of missions and reconfigurations in FPGA-based embedded system
2017
2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
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FPGAbased architectures offer for support for high flexibility with dynamic reconfiguration features. ...
We propose an autonomic control architecture for self-adaptive and self-reconfigurable FPGA-based embedded systems. ...
Such reconfigurations can be performed at fine-grain, but in this work we consider more coarse-grained configurations compliant with the good ratio between execution and configuration times. ...
doi:10.1109/ahs.2017.8046358
dblp:conf/ahs/GueyeRD17
fatcat:2wlnof6uzrgj3e3ew4aoyvgqgi
Adaptive resource management in middleware: a survey
2004
IEEE Distributed Systems Online
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Some researchers have introduced adaptive resource management support in middleware platforms and as a result have produced approaches offering facilities for configuring and reconfiguring resources. ...
Current middleware technologies, such as the Common Object Request Broker Architecture (CORBA) 1 and .NET (http://msdn.microsoft.com/net), mask system and network heterogeneity problems and alleviate the ...
Acknowledgments We thank the reviewers for their valuable comments, which have notably improved this article's content. ...
doi:10.1109/mdso.2004.11
fatcat:6w3fjtkxgbew7i5ed6it2z47iy
An Overview of Reconfigurable Hardware in Embedded Systems
2006
EURASIP Journal on Embedded Systems
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Reconfigurable hardware can provide a flexible and efficient platform for satisfying the area, performance, cost, and power requirements of many embedded systems. ...
This article presents an overview of reconfigurable computing in embedded systems, in terms of benefits it can provide, how it has already been used, design issues, and hurdles that have slowed its adoption ...
MONTIUM is an energy-efficient coarse-grained reconfigurable architecture designed for 16bit DSP applications [122] . ...
doi:10.1155/es/2006/56320
fatcat:bxvszbzy7fhgbexlbitlar7bra
An Overview of Reconfigurable Hardware in Embedded Systems
2006
EURASIP Journal on Embedded Systems
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Reconfigurable hardware can provide a flexible and efficient platform for satisfying the area, performance, cost, and power requirements of many embedded systems. ...
This article presents an overview of reconfigurable computing in embedded systems, in terms of benefits it can provide, how it has already been used, design issues, and hurdles that have slowed its adoption ...
MONTIUM is an energy-efficient coarse-grained reconfigurable architecture designed for 16bit DSP applications [122] . ...
doi:10.1186/1687-3963-2006-056320
fatcat:lybcy4xldvbvjhhzdci5ws37oy
An Overview of Low-Power Techniques for Field-Programmable Gate Arrays
2008
2008 NASA/ESA Conference on Adaptive Hardware and Systems
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This paper provides an overview of low-power techniques for field-programmable gate arrays (FPGAs ). ...
It also describes current research on circuit-level and architecture-level design techniques. Recent studies on power modelling and on low-power computer-aided design (CAD) are also reported. ...
In [27] , several power reduction techniques, such as register file elimination and efficient instruction fetch, are proposed for a coarse-grain reconfigurable cell-based architecture; up to 3.6 times ...
doi:10.1109/ahs.2008.71
dblp:conf/ahs/LamoureuxL08
fatcat:xdtvjfckenduxosf5tpoj3v4kq
Battery-Aware Loop Nests Mapping for CGRAs
2015
IEICE transactions on information and systems
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Coarse-grained Reconfigurable Architecture (CGRA) is a promising mobile computing platform that provides both high performance and high energy efficiency. ...
PENG et al.: BATTERY-AWARE LOOP NESTS MAPPING FOR CGRAS 231 factor which affects the battery usage and lifetime in task mapping, and an optimal schedule which uses appropriate area of FPGA is chosen. ...
Introduction Coarse-grained Reconfigurable Architecture (CGRA) is a promising mobile platform providing high performance, high flexibility, and high energy efficiency. ...
doi:10.1587/transinf.2014rcp0003
fatcat:onsjl7uh7vh47gclyae5yczloy
Dynamic Reconfiguration of Security Policies in Wireless Sensor Networks
2015
Sensors
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and the FamiWare middleware (a DSPL approach to automatically configure and reconfigure instances of a middleware for WSNs). ...
This means that applications for WSNs need mechanisms for self-adaptation and for self-protection based on the dynamic adaptation of the algorithms used to provide security. ...
With regards to the modifications in the software architecture, it is possible to perform coarse-grained modifications, such as remove or add a service, and it is also possible to make fine-grained modifications ...
doi:10.3390/s150305251
pmid:25746093
pmcid:PMC4435211
fatcat:5rj3ricyangrrbr6xab2aerlna
Application Scenarios in Streaming-Oriented Embedded System Design
2006
2006 International Symposium on System-on-Chip
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A case study shows the use of application scenarios for low energy design, under both soft and hard real-time constraints. ...
Therefore, much work has been done in developing design methodologies for embedded systems to cope with these tight requirements. ...
For larger switching times, fine-grain DVS is infeasible or coarse-grain DVS outperforms it.
B. ...
doi:10.1109/issoc.2006.321995
dblp:conf/issoc/GheorghitaBC06
fatcat:sxtuwdftsvg2jf5ttfdqn24xvu
Application Scenarios in Streaming-Oriented Embedded-System Design
2008
IEEE Design & Test of Computers
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A case study shows the use of application scenarios for low energy design, under both soft and hard real-time constraints. ...
Therefore, much work has been done in developing design methodologies for embedded systems to cope with these tight requirements. ...
For larger switching times, fine-grain DVS is infeasible or coarse-grain DVS outperforms it.
B. ...
doi:10.1109/mdt.2008.158
fatcat:5wslwpx2nvg4hoh5b3hytmt4za
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