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2019 Index IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 38
2019
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
., +, TCAD June 2019 1161-1174 Simultaneous Area and Latency Optimization for Stochastic Circuits by D Flip-Flop Insertion. ...
Lahti, S., +, TCAD May 2019 898-911 Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks. ...
doi:10.1109/tcad.2020.2964359
fatcat:qjr6i73tkrgnrkkmtjexbxberm
Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to Software
2016
Proceedings of the IEEE
We conclude with an outlook for the emerging field. ...
with new techniques for memoization (i.e., spatial or temporal reuse of computation). ...
typical flip-flops [see Fig. 7(a)] with EDS circuits [see Fig. 7(c)] on the critical paths. ...
doi:10.1109/jproc.2016.2518864
fatcat:sxrsu3excbdg5p7sk4iczz262y
Two Sides of the Same Coin: Boons and Banes of Machine Learning in Hardware Security
2021
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Recent research has revealed that the outputs of Deep Neural Networks (DNNs) can be easily corrupted by imperceptibly small input perturbations. ...
It can continuously learn from a large amount of labeled data with a layered structure. ...
The shadow flip flop operates with a delayed clock (clk + ) while the multiplexor is controlled by the error signal from an XOR gate. ...
doi:10.1109/jetcas.2021.3084400
fatcat:c4wdkghpo5fwbhvkekaysnahzm
2020 Index IEEE Transactions on Circuits and Systems I: Regular Papers Vol. 67
2020
IEEE Transactions on Circuits and Systems Part 1: Regular Papers
., +, TCSI March 2020 972-982 Neural networks A Neural Network Assistance AMPPT Solar Energy Harvesting System With 89.39% Efficiency and 0.01-0.5% Tracking Errors. ...
Zong, Z., +, TCSI May 2020 1469-1480
Flip-flops
A 0.36-V 5-MS/s Time-Mode Flash ADC With Dickson-Charge-Pump-
Based Comparators in 28-nm CMOS. ...
., TCSI Dec. 2020 5092-5100
High-Efficiency Low Voltage Inverse Class-F Power Amplifier Design Based on Harmonic Control Network Analysis. ...
doi:10.1109/tcsi.2021.3055003
fatcat:kbmst5td2bbvtl7vpbj3knnkri
High level synthesis of neural network chips
[chapter]
1993
Lecture Notes in Computer Science
Behavioural descriptions include flip-flops, memories, and FSMs (see Figure 7.10). ...
However if the assignment refers to a constant 0, then a reset pin is used instead, indicating that the counter must have logic for resetting every internal flip-flop. ...
doi:10.1007/3-540-56798-4_186
fatcat:l44fgibfd5hl7dzcnzmpk7zyqe
A Survey of Machine Learning for Computer Architecture and Systems
[article]
2021
arXiv
pre-print
For ML-based design methodology, we follow a bottom-up path to review current work, with a scope of (micro-)architecture design (memory, branch prediction, NoC), coordination between architecture/system ...
For ML-based modelling, we discuss existing studies based on their target level of system, ranging from the circuit level to the architecture/system level. ...
By encode structure of computational graphs with static graph embeddings [2] or learnable graph embeddings [270] , the trained placement policy exhibits great generalizability to unseen neural networks ...
arXiv:2102.07952v1
fatcat:vzj776a6abesljetqobakoc3dq
FPGAs in Industrial Control Applications
2011
IEEE Transactions on Industrial Informatics
Another example of illustration is the Neural Network Systems. To show the interest of FPGAs in this field, some case studies have been presented. ...
For the combinatorial operations, a set of Look-Up-Tables (LUTs) are included. This is the same for the sequential operations with a set of D-Flip-Flops. ...
It consists of a 4-bit LUT, a D-Flip-Flop, a carry chain (for arithmetic operations) and a multiplexer, [39] - [42] . ...
doi:10.1109/tii.2011.2123908
fatcat:mkjify6zlzgnjglgpyoixh53ra
Classification Framework for Analysis and Modeling of Physically Induced Reliability Violations
2015
ACM Computing Surveys
Thus, research trends and opportunities for novel approaches can be identified. ...
A good understanding of reliability threats is crucial for the creation of efficient mitigation techniques. ...
A trained artificial neural network (ANN) illustrates the correlation of network reliability with the reliability of the network's links and its topology. ...
doi:10.1145/2678276
fatcat:dooenvvmonhi7f6rr6rqx2myuq
SPINN: Synergistic Progressive Inference of Neural Networks over Device and Cloud
[article]
2020
arXiv
pre-print
Despite the soaring use of convolutional neural networks (CNNs) in mobile applications, uniformly sustaining high-performance inference on mobile has been elusive due to the excessive computational demands ...
Nevertheless, by relying on the cloud to produce outputs, emerging mission-critical and high-mobility applications, such as drone obstacle avoidance or interactive applications, can suffer from the dynamic ...
For these experiments, the SPINN schedulerâĂŹs objectives were set to maximise throughput with up to 1 percentage point (pp) tolerance in accuracy drop with respect to the CNN's last exit. ...
arXiv:2008.06402v1
fatcat:7vtsf2qxyvd6loo4as7hnzjaoe
2017
2022
Zenodo
CO3: Analyse simple circuits containing transistors CO4: Understand concept of cellular wireless networks. CO5: Understand Number systems and design basic digital circuits. ...
Einstein's coefficients (expression for energy density). Requisites of a Laser system. Condition for laser action. ...
MODULE 4 -Flops: RS Flip-Flops, Gated Flip-Flops, Edge-triggered RS FLIP-FLOP, Edgetriggered D FLIP-FLOPs, Edge-triggered JK FLIPFLOPs. ...
doi:10.5281/zenodo.7370727
fatcat:qwp5w2tkvna2jkflbj5kkt4gta
AI/ML Algorithms and Applications in VLSI Design and Technology
[article]
2023
arXiv
pre-print
This paper thoroughly reviews the AI/ML automated approaches introduced in the past towards VLSI design and manufacturing. ...
Conventional methodologies employed for such tasks are largely manual; thus, time-consuming and resource-intensive. ...
A shallow neural network (SNN) is an NN with one or two hidden layers. A network with tens to hundreds of such layers is called a deep neural network (DNN). ...
arXiv:2202.10015v2
fatcat:ej3pdqucqna3hlxbiq4mzmbl5y
2019 Subject Index (A-M) IEEE Transactions on Magnetics Vol. 55
2019
IEEE transactions on magnetics
., +, TMAG Sept. 2019
3500113
Flip-flops
Non-Volatile Spintronic Flip-Flop Design for Energy-Efficient SEU and
DNU Resilience. ...
., +, TMAG June 2019 7000404 Error correction codes A Study on Block-Based Neural Network Equalization in TDMR System With LDPC Coding. ...
doi:10.1109/tmag.2020.2971157
fatcat:zxevj2qaozdsbkjtongdalsfdu
A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automation
[article]
2022
arXiv
pre-print
for using AI/ML for security-aware circuit design. ...
In this paper, we summarize the state-of-the-art in AL/ML for circuit design/optimization, security and engineering challenges, research in security-aware CAD/EDA, and future research directions and needs ...
For example, a graph neural network (GNN) can replace the graph-based algorithms that are the basis of the original version. Fault Injection Tolerance. ...
arXiv:2204.09579v2
fatcat:tebjzerhfvaepbwmka7ipiccxy
Design and Analysis of Johnson Counter Using Finfet Technology
2013
IOSR Journal of VLSI and Signal processing
Fin-type field-effect transistors (FinFETs) are promising substitutes for bulk CMOS in nano-scale circuits.FinFET, which is a double-gate field effect transistor (DGFET), is more versatile than traditional ...
Karkare for moral support. I am really thankful to all professors of VIIT for their guidance. Without their help it was tough job for me. ...
Siva Yellampalli of UTL technologies for their support in the lab, and especially the first author is thankful to the management of Don Bosco Institute of Technology, Bangalore for their constant encouragement ...
doi:10.9790/4200-0160106
fatcat:hdbvjkcldbhutardkebeuqei5y
Surveillance on Manycasting Over Optical Burst Switching (OBS) Networks under Secure Sparse Regeneration
2013
IOSR Journal of Electronics and Communication Engineering
(OBS) networks can become an everyday reality. ...
In wavelength-routed WDM optical networks requires regeneration for few light paths, when the strength of optical signal reduced and also security and privacy are essential before Optical Burst Switching ...
Also the author would like to thank reviewers for their valuable comments to improve the quality of the paper. ...
doi:10.9790/2834-0460108
fatcat:5qasfbq4n5cbpln42h3pa3cucq
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