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A neural network approach to MVDR beamforming problem

Po-Rong Chang, Wen-Hao Yang, Kuan-Kin Chan
1992 IEEE Transactions on Antennas and Propagation  
A Hopfield-type neural network approach which leads to an analog circuit for implementing the real-time adaptive antenna array is presented.  ...  To tackle this difficulty, a neural analog circuit solution is particularly attractive in real-time applications with minimization of a cost function subject to constraints.  ...  Based on this fact, the neural-based analog circuits are suggested to be one of the favorable choices for the real-time implementation for solving the MVDR problem.  ... 
doi:10.1109/8.135474 fatcat:feaolfuihrcx3clpsoprk44i7i

Distributed perimeter patrolling and tracking for camera networks

Mauro Baseggio, Angelo Cenedese, Pierangelo Merlo, Mauro Pozzi, Luca Schenato
2010 49th IEEE Conference on Decision and Control (CDC)  
The algorithm converges to an optimal solution, and its distribuited implementation is obtainet through an electric circuit analogy.  ...  In this work, we propose a distributed control strategy for perimeter patrolling and target tracking in a multi-camera videosurveillance system with communication, resources and speed constraints.  ...  the u i (·) variables, but the control law is only applied at time instants in T i and not at every discrete time instant m∆ as it is for the discrete-time version model of the initial electric circuit  ... 
doi:10.1109/cdc.2010.5717883 dblp:conf/cdc/BaseggioCMPS10 fatcat:dvdacpnug5hmzlzauinwataxfu

Analog continuous-time filter designing for Morlet wavelet transform using constrained L2-norm approximation

Qiang Wang, Chen Meng, Cheng Wang
2020 IEEE Access  
CONSTRAINED L2-NORM APPROXIMATION Under the scheme of common-pole filter construction, the key step to control the implementation accuracy is the approximation for time-shifted Gaussian envelope.  ...  That makes it possible to share partial circuit components in analog implementations of () real Hs and () imag Hs . V. APPLICATION EXAMPLES A.  ...  For more information, see https://creativecommons.org/licenses/by/4.0/. This article has been accepted for publication in a future issue of this journal, but has not been fully edited.  ... 
doi:10.1109/access.2020.3007254 fatcat:ok7wkdyqobe53fsa5t2ua2jb6q

Real-time analog global optimization with constraints: application to the direction of arrival estimation problem

T.M. Jelonek, J.P. Reilly, Q. Wu
1995 IEEE transactions on circuits and systems - 2, Analog and digital signal processing  
An analog technique for real-time, multi-variate, global optimization with constraints is presented.  ...  Even though the proposed method is applicable to a wide range of engineering problems, the real-time, global and other capabilities of this method are demonstrated speci cally with an optimization problem  ...  Jian Kan Yang for useful input.  ... 
doi:10.1109/82.378037 fatcat:wasnefy53jbtlp36ggfeku2cce

Performance bound and yield analysis for analog circuits under process variations

Xue-Xin Liu, A. A. Palma-Rodriguez, S. Rodriguez-Chavez, Sheldon X.-D Tan, E. Tlelo-Cuautle, Yici Cai
2013 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)  
Yield estimation for analog integrated circuits are crucial for analog circuit design and optimization in the presence of process variations.  ...  Then frequency response bounds of the transfer functions in terms of magnitude and phase are obtained by a nonlinear constrained optimization technique.  ...  Review of Symbolic Analysis for Analog Circuits Graph-based symbolic technique is a viable tool for calculating the behavior or characteristic of analog circuits [14] .  ... 
doi:10.1109/aspdac.2013.6509692 dblp:conf/aspdac/LiuPRTTC13 fatcat:3tlrutq6jzgnfj3pjlpsurpgbi

Segmentation Circuits Using Constrained Optimization

John G. Harris
1991 Neural Information Processing Systems  
By interpreting the minimized energy as the generalized power of a nonlinear resistive network, a continuous-time analog segmentation circuit was constructed.  ...  A novel segmentation algorithm has been developed utilizing an absolutevalue smoothness penalty instead of the more common quadratic regularizer.  ...  Acknowledgements Much of this work was perform at Calt.ech with the support of Christof Koch and Carver Mead.  ... 
dblp:conf/nips/Harris91 fatcat:ioh3zkzwxzbfvay7r7j6y6ly5y

Mixed-signal architecture of randomized receding horizon control for miniature robotics

Michael J. Kuhlman, Eduardo Arvelo, Shuoxin Lin, Pamela A. Abshire, Nuno C. Martins
2012 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)  
To accommodate the demands of this application area, we describe the architecture of a mixed-signal mobile robot control system using randomized receding horizon control.  ...  Control of miniature mobile robots in unconstrained environments is an ongoing challenge.  ...  Moreover, the states and control actions are constrained in that: x j|k ∈ X k , u j|k ∈ U (3) for all time instances j ∈ {1, ...N }.  ... 
doi:10.1109/mwscas.2012.6292084 dblp:conf/mwscas/KuhlmanALAM12 fatcat:qmwuos5y7jce3emz5rr6w75rae

Performance bound analysis of analog circuits in frequency- and time-domain considering process variations

Xue-Xin Liu, Sheldon X.-D. Tan, Adolfo Adair Palma-Rodriguez, Esteban Tlelo-Cuautle, Guoyong Shi
2013 ACM Transactions on Design Automation of Electronic Systems  
Monte Carlo for both frequency-domain and time-domain bound analyses.  ...  In this article, we propose a new performance bound analysis of analog circuits considering process variations.  ...  for statistical analysis and optimization for analog/mixed-signal methods at current stage.  ... 
doi:10.1145/2534395 fatcat:ium4ya54pjdm5oegdf72igxdmu

Programmable switched-capacitor neural network for MVDR beamforming

Wen-Hao Yang, Po-Rong Chang
1996 IEEE Journal of Oceanic Engineering  
Abstruct-In this paper, a real-time adaptive antenna array based on a neural network approach is presented.  ...  Since an array operating in a nonstationary environment requires a programmable synaptic weight matrix for the neural network, the switched-capacitor (SC) circuits with the capability of programmability  ...  In order to meet the requirement of neural-based optimizer, one should convert it into a real-value constrained quadratic programming formulation.  ... 
doi:10.1109/48.485203 fatcat:hnvgz4lpv5enjbkitu6m7s5kyy

DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks

Ahmet F. Budak, Prateek Bhansali, Bo Liu, Nan Sun, David Z. Pan, Chandramouli V. Kashyap
2021 2021 58th ACM/IEEE Design Automation Conference (DAC)  
to handle constrained nature of analog sizing [11] .  ...  Analog Circuit Sizing: Problem Formulation We formulate analog circuit sizing task as a constrained optimization problem succinctly as below. minimize f 0 (x) subject to f i (x) ≤ 0 for i = 1, . . . ,  ... 
doi:10.1109/dac18074.2021.9586139 fatcat:7dd6fow2rbdvnbrijtdwhezdqq

Table of contents

2006 Proceedings of the Design Automation & Test in Europe Conference  
Schoeberl Optimizing the Generation of Object-Oriented Real-Time Embedded Applications Based on the Real-Time Specification for Java .................................... M A. Wehrmeister, C. F.  ...  Mitra Performance Optimization for Energy-Aware Adaptive Checkpointing in Embedded Real-Time Systems............ 678 Z7 Li,H Chen andS.  ... 
doi:10.1109/date.2006.243944 fatcat:og5za5ztvjbbrhxzsnji2pyfde

Towards Analog Design Automation using Evolutionary Algorithm: A Review

A. Sasikumar, R. Muthaiah
2016 Indian Journal of Science and Technology  
Computation methods provide the set of feasible solutions for the optimal circuit design of analog integrated circuits.  ...  It is necessary to integrate both analog and digital in a single chip for real world communication. Due to system level integration we need analog design automation tool for IC design.  ...  This algorithm is not applicable or efficient to the real-time optimization, continuous optimization and multiobjective optimization.  ... 
doi:10.17485/ijst/2016/v9i39/97980 fatcat:ih4ybelukvb4ri6sgnfnbf3rga

Optimized is Not Always Optimal - The Dilemma of Analog Design Automation

Juergen Scheible
2022 Proceedings of the 2022 International Symposium on Physical Design  
These issues lie in the mode of operation of the typical optimization processes employed for the synthesizing tasks.  ...  I will show that the dilemma that arises in analog design with these optimizers is the root cause of the low level of automation in analog design.  ...  And normally they cannot be automatically passed to the optimizers. This type of "constraining" work typically has to be done manually and is very time-consuming.  ... 
doi:10.1145/3505170.3511042 fatcat:x5gt66udpbbnzotjbxgvu5mhdi

Formal Verification of Analog and Mixed Signal Designs: Survey and Comparison

Mohamed Zaki, Sofiene Tahar, Guy Bois
2006 2006 IEEE North-East Workshop on Circuits and Systems  
Analog and mixed signal (AMS) circuits are important integrated circuits that are usually needed at the interface between the electronic system and the real world.  ...  Researchers started lately studying the applicability of formal methods for the verification of AMS systems as a way to tackle the limitations of conventional verification methods like simulation.  ...  In order to tackle the state explosion problem due to the exhaustive analysis, they proposed in addition using techniques from optimal control (i.e., hybrid constrained optimization) in order to find bounds  ... 
doi:10.1109/newcas.2006.250926 fatcat:lv3amsihvjdori7ucu4ryxq4i4

Verification and Design Methods for the BrainScaleS Neuromorphic Hardware System

Andreas Grübl, Sebastian Billaudelle, Benjamin Cramer, Vitali Karasenko, Johannes Schemmel
2020 Journal of Signal Processing Systems  
Simulation methods for automated analysis and pre-tapeout calibration of the highly parameterizable analog neuron and synapse circuits and for hardware-software co-development of the digital logic and  ...  Accelerated operation of neuromorphic circuits and highly-parallel digital data buses between the full-custom neuromorphic part and the PPU require custom methodologies to close the digital signal timing  ...  Hartel for the timing characterization of the anncore. We thank S. Höppner and S. Scholze from the group Hochparallele VLSI-Systeme und Neuromikroelektronik of C.  ... 
doi:10.1007/s11265-020-01558-7 fatcat:wkgpqcrdgfb43kssrr6o7pa36y
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