Takanori Okuma
ABSTRACT
This paper presents a new concept called active data bitwidth, which is the effective data length of data bus. By means of profiling the active data bitwidth dynamically, we present a novel low-energy memory access technique for on-chip data memory design. By reducing the redundant access energy of data memory, our experimental results of two real applications, show that we can achieve significant energy reduction. Compared to the monolithic memory, for JPEG, 52.2%; for MPEG-2 84.2%, the energy reduction is reported. Compared to the memory banking technique, 12.3% energy reduction for JPEG and 65.9% for MPEG-2 is reported.
- L. Benini, A. Macii, E. Macii, and M. Poncino. "Synthesis of Application-Specific Memories for Power Optimization in Embedded Systems". In Proc. of 37th DAC, pages 300--303, June 2000. Google Scholar
Digital Library
- L. Benini, A. Macii, and M. Poncino. "A Recursive Algorithm for Low-Power Memory Partitioning". In Proc. of International Symposium on Low Power Electronics and Design, pages 78--83, August 2000. Google ScholarDigital Library
- F. Catthoor, S. Wuytack, E. D. Greef, and F. Balasa. Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design. Kluwer, 1998. Google ScholarDigital Library
- S. L. Coumeri and D. E. Thomas. "An Environment for Exploring Low Power Memory Configurations in System Level Design". In Proc. of ICCDesign, pages 348--353, September 1999. Google ScholarDigital Library
- A. H. Farrahi, G. E. Tellez, and M. Sarrafzadeh. "Memory Segmentation to Exploit Sleep Mode Operation". In Proc. of 32th Design Automation Conference, pages 36--41, June 1995. Google ScholarDigital Library
- J. Hennessy and D. Patterson. Computer Archtecture A Quantitive Approach. Morgan Kaufman, 1996. Google ScholarDigital Library
- T. Ishihara and H. Yasuura. "A Power Reduction Technique with Object Code Merging for Application Specific Embedded Processors". In Proc. of DATE, pages 617--622, March 2000. Google ScholarDigital Library
- U. Ko and P. Balsara. "Energy Optimization of Multilevel Cache Architectures for RISC and CISC Processors". IEEE Transanctions on VLSI Systems, 6(2):pages 299--308, Jun 1998. Google ScholarDigital Library
- P. R. Panda, F. Catthoor, N. D. Dutt, K. Danckaert, E. Brockmeyer, and A. Vandercappelle. "Data and Memory Optimization Techniques for Embedded Systems". ACM Transactions of Design Automation of Electronics Systems, 6(2):pages 149--206, April 2001. Google ScholarDigital Library
- P. R. Panda and N. D. Dutt. "Low-Power Memory Mapping Through Reducing Address Bus Activity". IEEE Transanctions on VLSI Systems, 7(3):pages 309--320, September 1999. Google ScholarDigital Library
- P. R. Panda, N. D. Dutt, and A. Nicolau. "On-Chip vs. Off-Chip Memory: The Data Partitioning Problem in Embedded Processor-Based Systems". ACM Transactions of Design Automation of Electronics Systems, 5(3):pages 682--704, July 2000. Google ScholarDigital Library
- J. Rabaey and M. Pedram. Low Power Design Methodologies. Kluwer, 1996.Google ScholarDigital Library
- W.-T. Shiue and C. Chakrabarti. "Memory Exploration for Low Power Embedded Systems". In Proc. of 36th Design Automation Conference, pages 140--145, June 1999. Google ScholarDigital Library
- C. Su and A. Despain. "Cache Design Tradeoffs for Power and Performance Optimization: A Case Study". In Proc. of International Symposium on Low Power Electronics and Design, pages 63--68, April 1995. Google ScholarDigital Library
- L. Villa, M. Zhang, and K. Asanovic. "Dynamic Zero Compression for Cache Energy Reduction". In Proc. of MICRO-33, 2000. Google ScholarDigital Library
Index Terms
- Reducing access energy of on-chip data memory considering active data bitwidth
Recommendations
Reducing DRAM Image Data Access Energy Consumption in Video Processing
This paper presents domain-specific techniques to reduce DRAM energy consumption for image data access in video processing. In mobile devices, video processing is one of the most energy-hungry tasks, and DRAM image data access energy consumption becomes ...
Reducing off-chip memory access costs using data recomputation in embedded chip multi-processors
DAC '07: Proceedings of the 44th annual Design Automation ConferenceThere have been numerous efforts on Scratch-Pad Memory (SPM) management in the context of single CPU systems and, more recently, multi-processor architectures. This paper presents a novel SPM space utilization strategy, for embedded chip multi-processor ...
Data memory design considering effective bitwidth for low-energy embedded systems
ISSS '02: Proceedings of the 15th international symposium on System SynthesisThis paper presents a novel low-energy memory design technique, considering effective bitwidth of variables for application-specific systems, called VAbM technique. It targets the exploitation of both data locality and effective bitwidth of variables to ...
Comments