ABSTRACT
Security against hardware trojans is currently becoming an essential ingredient to ensure trust in information systems. A variety of solutions have been introduced to reach this goal, ranging from reactive (i.e., detection-based) to preventive (i.e., trying to make the insertion of a trojan more difficult for the adversary). In this paper, we show how testing (which is a typical detection tool) can be used to state concrete security guarantees for preventive approaches to trojan-resilience. For this purpose, we build on and formalize two important previous works which introduced ``input scrambling" and ``split manufacturing" as countermeasures to hardware trojans. Using these ingredients, we present a generic compiler that can transform any circuit into a trojan-resilient one, for which we can state quantitative security guarantees on the number of correct executions of the circuit thanks to a new tool denoted as ``testing amplification". Compared to previous works, our threat model covers an extended range of hardware trojans while we stick with the goal of minimizing the number of honest elements in our transformed circuits. Since transformed circuits essentially correspond to redundant multiparty computations of the target functionality, they also allow reasonably efficient implementations, which can be further optimized if specialized to certain cryptographic primitives and security goals.
- J. Aarestad, D. Acharyya, R. M. Rad, and J. Plusquellic. "Detecting Trojans Through Leakage Current Analysis Using Multiple Supply Pad I DDQs". In: IEEE Trans. Information Forensics and Security 4 (2010). Google ScholarDigital Library
- S. O. Adee. "The Hunt For The Kill Switch". In: IEEE Spectrum 5 (May 2008). issn: 0018-9235. Google ScholarDigital Library
- D. Agrawal, S. Baktir, D. Karakoyunlu, P. Rohatgi, and B. Sunar. "Trojan Detection using IC Fingerprinting". In: IEEE S&P. 2007. Google ScholarDigital Library
- M. R. Albrecht, C. Rechberger, T. Schneider, T. Tiessen, and M. Zohner. "Ciphers for MPC and FHE". In: EUROCRYPT. 2015.Google ScholarCross Ref
- G. Ateniese, A. Kiayias, B. Magri, Y. Tselekounis, and D. Venturi. Secure Outsourcing of Circuit Manufacturing. Cryptology ePrint Archive, Report 2016/527. 2016.Google Scholar
- C. Bayer and J.-P. Seifert. "Trojan-resilient circuits". In: PROOFS. 2013.Google Scholar
- S. Bhunia, M. S. Hsiao, M. Banga, and S. Narasimhan. "Hardware Trojan attacks: threat analysis and countermeasures". In: Proceedings of the IEEE 8 (2014).Google Scholar
- E. Biham, Y. Carmeli, and A. Shamir. "Bug Attacks". In: CRYPTO. 2008. Google ScholarDigital Library
- E. Biham and A. Shamir. "Differential Fault Analysis of Secret Key Cryptosystems". In: CRYPTO. 1997. Google ScholarDigital Library
- D. Boneh, R. A. DeMillo, and R. J. Lipton. "On the Importance of Eliminating Errors in Cryptographic Computations". In: J. Cryptology 2 (2001). Google ScholarDigital Library
- B. B. Brumley and N. Tuveri. "Remote Timing Attacks Are Still Practical". In: ESORICS. 2011. Google ScholarDigital Library
- C. K. Chan, H. Peng, G. Liu, K. McIlwrath, X. F. Zhang, R. A. Huggins, and Y. Cui. "High-performance lithium battery anodes using silicon nanowires". In: Nature nanotechnology1 (2008).Google ScholarCross Ref
- S. Chari, C. S. Jutla, J. R. Rao, and P. Rohatgi. "Towards Sound Approaches to Counteract Power-Analysis Attacks". In: CRYPTO. 1999. Google ScholarDigital Library
- R. Cramer. "Introduction to Secure Computation". In: Lectures on Data Security, Modern Cryptology in Theory and Practice, Summer School, Aarhus, Denmark, July 1998. 1998. Google ScholarDigital Library
- S. Dziembowski, S. Faust, and F.-X. Standaert. Private Circuits III: Hardware Trojan-Resilience via Testing Amplification. Cryptology ePrint Archive. 2016.Google ScholarDigital Library
- G. Fox, F Chu, and T Davenport. "Current and future ferroelectric nonvolatile memory technology". In: Journal of Vacuum Science & Technology B5 (2001).Google Scholar
- V. Grosso, F. Standaert, and S. Faust. "Masking vs. multiparty computation: how large is the gap for AES?" In: J. Cryptographic Engineering 1 (2014).Google Scholar
- V. Grosso, G. Leurent, F. Standaert, and K. Varici. "LS-Designs: Bitslice Encryption for Efficient Masked Software Implementations". In: FSE. 2014.Google Scholar
- S. K. Haider, C. Jin, M. Ahmad, D. M. Shila, O. Khan, and M. van Dijk. Advancing the State-of-the-Art in Hardware Trojans Detection. Cryptology ePrint Archive, Report 2014/943. 2014.Google Scholar
- F. Imeson, A. Emtenan, S. Garg, and M. V. Tripunitara. "Securing Computer Hardware Using 3D Integrated Circuit (IC) Technology and Split Manufacturing for Obfuscation". In: USENIX Security Symposium. 2013. Google ScholarDigital Library
- Y. Ishai, A. Sahai, and D. Wagner. "Private Circuits: Securing Hardware against Probing Attacks". In: CRYPTO. 2003.Google Scholar
- Y. Ishai, M. Prabhakaran, A. Sahai, and D. Wagner. "Private Circuits II: Keeping Secrets in Tamperable Circuits". In: EUROCRYPT. 2006. Google ScholarDigital Library
- P. C. Kocher. "Timing Attacks on Implementations of Die-Hellman, RSA, DSS, and Other Systems". In: CRYPTO. 1996. Google ScholarDigital Library
- P. C. Kocher, J. Jaffe, and B. Jun. "Differential Power Analysis". In: CRYPTO. 1999. Google ScholarCross Ref
- A. Moradi, A. Poschmann, S. Ling, C. Paar, and H. Wang. "Pushing the Limits: A Very Compact and a Threshold Implementation of AES". In: EUROCRYPT 2011. 2011. Google ScholarDigital Library
- S. Narasimhan, D. Du, R. S. Chakraborty, S. Paul, F. G. Wolff, C. A. Papachristou, K. Roy, and S. Bhunia. "Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis". In: IEEE Trans. Computers 11 (2013). Google ScholarDigital Library
- S. Priya and D. J. Inman. Energy harvesting technologies. 2009. Google ScholarDigital Library
- M. Tehranipoor and F. Koushanfar. "A Survey of Hardware Trojan Taxonomy and Detection". In: IEEE Design & Test of Computers 1 (2010). Google ScholarDigital Library
- R. S. Wahby, M. Howald, S. Garg, abhi shelat, and M. Walfish. Verifiable ASICs. Cryptology ePrint Archive, Report 2015/1243. 2015.Google Scholar
- A. Waksman and S. Sethumadhavan. "Silencing Hardware Backdoors". In: IEEE S&P. 2011. Google ScholarDigital Library
Index Terms
- Private Circuits III: Hardware Trojan-Resilience via Testing Amplification
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