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Integrating Physical Constraints in HW-SW Partitioning for Architectures With Partial Dynamic Reconfiguration
2006
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
Partial dynamic reconfiguration is a key feature of modern reconfigurable architectures such as the Xilinx Virtex series of devices. However, this capability imposes strict placement constraints such that even exact system-level partitioning (and scheduling) formulations are not guaranteed to be physically realizable due to placement infeasibility. We first present an exact approach for hardware-software (HW-SW) partitioning that guarantees correctness of implementation by considering placement
doi:10.1109/tvlsi.2006.886411
fatcat:jjwx65abcnbmddeksuov7fwn5m