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Low-Power Resistive Memory Integrated on III-V Vertical Nanowire MOSFETs on Silicon
2020
IEEE Electron Device Letters
III-V vertical nanowire MOSFETs (VNW-FETs) have the potential to extend Moore's law owing to their excellent material properties. To integrate highly scaled memory cells coupled with high performance selectors at minimal memory cell area, it is attractive to integrate low-power resistive random access memory (RRAM) cells directly on to III-V VNW-FETs. In this work, we report the experimental demonstration of successful RRAM integration with III-V VNW-FETs. The combined use of VNW-FET drain
doi:10.1109/led.2020.3013674
fatcat:brrlq4ctxba4fhm6jpttclpcpq