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Hauberk: Lightweight Silent Data Corruption Error Detector for GPGPU
2011
2011 IEEE International Parallel & Distributed Processing Symposium
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On average, 16-33% of injected faults cause silent data corruption (SDC) errors in the HPC programs executing on GPU. ...
ACKNOWLEDGEMENT We would like to thank John Stratton in the IMPACT group who provided data sets for some benchmark programs. ...
data corruption (SDC) error. ...
doi:10.1109/ipdps.2011.36
dblp:conf/ipps/YimPSKI11
fatcat:rew7nnglzng67jpjh2ttngn5ou
Characterizing System-Level Masking Effects against Soft Errors
2021
Electronics
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This study analyzes and characterizes microarchitecture-level and software-level masking effects by developing an automated framework with exhaustive fault injections (i.e., soft errors) based on a cycle-accurate ...
If their outputs are different, it is also defined as a failure (silent data corruption). ...
If their outputs are different, they are also defined as failures (i.e., silent data corruption). ...
doi:10.3390/electronics10182286
fatcat:ipsnsk6aizgw7mxiqsf4ugc7bm
Efficient soft error protection for commodity embedded microprocessors using profile information
2012
Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems - LCTES '12
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Silent corruptions or infinite loop: Faults that produce user visible corruptions, cause early program termination, or do not terminate in definite time are classified into this category. ...
In our experiments, faults in other microarchitectural structures are not explicitly injected, but faults in other structures predominantly manifest through register file as corrupted states. ...
doi:10.1145/2248418.2248433
dblp:conf/lctrts/KhudiaWM12
fatcat:e7wuhfunkfde3nc66ro3fd5yi4
An Ultra-Low-Cost Soft Error Protection Scheme Based on the Selection of Critical Variables
2021
Electronics
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In the real world, silent data corruption can result in severe data loss and can require months of debugging time [37, 38] . ...
This type of system failure is called silent data corruption (SDC) since they are hardly found until programs finish. ...
doi:10.3390/electronics10172101
fatcat:2hvrsnnpxrgbtb2tms6uu4mkp4
Reliability: Fallacy or Reality?
2007
IEEE Micro
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Mukherjee: A system hang is not necessarily a detected error; it can cause silent data corruptions. ...
If the hardware failure is a silent failure, I don't know if my data is corrupted, I have no indication. ...
doi:10.1109/mm.2007.107
fatcat:z3nkucclerednjg445p77c6lci
Revisiting Symptom-Based Fault Tolerant Techniques against Soft Errors
2021
Electronics
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These failures are defined as
silent output corruptions (SOCs) [49], a meaningful subset of silent data corruptions. ...
Didehban, M.; Shrivastava, A. nZDC: A Compiler technique for near zero silent data corruption. ...
doi:10.3390/electronics10233028
fatcat:6xmgwau25bgxpjm2jdhjop623y
Design and Evaluation of Hybrid Fault-Detection Systems
2005
SIGARCH Computer Architecture News
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Data Corruption (SDC). ...
If the register value is used in a store instruction, faults during these vulnerable periods can lead to silent data corruption. ...
doi:10.1145/1080695.1069983
fatcat:muhy337xgbdxvclmdsmrmlnjwa
SimpliFI: Hardware Simulation of Embedded Software Fault Attacks
2021
Cryptography
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fault models hide the true sensitivity of the underlying processor hardware to fault injection, and they are unable to correctly capture fault effects in the programmer-invisible part of the processor microarchitecture ...
When faults are injected at the beginning of execution in stage 0, only clock glitch widths between 7.25 and 5.5 ns result in corrupted output data. ...
data flow. ...
doi:10.3390/cryptography5020015
fatcat:zjo6ea5tenc43ezyro4ircilyi
A Systematic Review of Fault Injection Attacks on IoT Systems
2022
Electronics
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Data Availability Statement: Not applicable.
Conflicts of Interest: The authors declare no conflict of interest. ...
Unlike the above-mentioned methods, the proposed approach could detect system-level threats, such as silent data corruption (SDC) and functional interruption (SEFI), for FPGA-based applications. ...
Data Corruption and Manipulation In this category, fault injection attacks affect the data being used in the targeted software. ...
doi:10.3390/electronics11132023
fatcat:ic5ytu5nlnfpnhlualafdbcztu
Phaser: Phased methodology for modeling the system-level effects of soft errors
2008
IBM Journal of Research and Development
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This paper presents an overview of Phaser, a toolset and methodology for modeling the effects of soft errors on the architectural and microarchitectural functionality of a system. ...
In this paper, the Phaser/M1 methodology is described with a single focus only on silent data corruption (SDC)related SER manifested at the program output. ...
Naturally, if a soft error hits a location with a live data value, it will corrupt the data. ...
doi:10.1147/rd.523.0293
fatcat:3ib34h73wffzfkebbhbvdtpv2y
Enabling GPGPU Low-Level Hardware Explorations with MIAOW
2015
ACM Transactions on Architecture and Code Optimization (TACO)
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We first explore if MIAOW is realistic and then use four case studies to show that MIAOW enables the following: physical design perspective to "traditional" microarchitecture, new types of research exploration ...
While useful for modeling first-order effects, these tools do not provide a detailed view of GPU microarchitecture and physical design. ...
PHYSICAL DESIGN PERSPECTIVE OF TRADITIONAL MICROARCHITECTURE RESEARCH Description. ...
doi:10.1145/2764908
fatcat:utj6prgm2zcctlb36ikgejny2e
CLEAN-ECC
2015
Proceedings of the 48th International Symposium on Microarchitecture - MICRO-48
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However, these schemes were not evaluated for their impact on silent data corruption risk in detail. ...
CE, DUE and SDC stand for corrected fault, detected but uncorrectable fault and silent data corruption. ...
doi:10.1145/2830772.2830799
dblp:conf/micro/GongRKCE15
fatcat:mjjew46fwzgv3iuilrlfnjmkki
RAP Model—Enabling Cross-Layer Analysis and Optimization for System-on-Chip Resilience
[chapter]
2020
Embedded Systems
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level, knowledge about the unit of design and its environment allow the transformation of the bit-related error functions into characteristic higher layer representations, such as error functions for data ...
Furthermore, we show by different examples how probabilistic bit flips are systematically abstracted and propagated towards instruction and data vulnerability at MPSoC architecture level, and how RAP can ...
Still, such problems are detectable on microarchitectural level. In (2) , silent data corruption (SDC) in the control algorithm happens. ...
doi:10.1007/978-3-030-52017-5_1
fatcat:ip3awa6v6bfrbbciabmtwuxl7a
GPGPUs: How to combine high computational power with high reliability
2014
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014
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As a way to control this experiment, ANL developed a test program that can be used to check for performance variations and silent data corruption. ...
Program failures can be further classified into crashes (i.e., hardware exceptions), hangs, and Silent Data Corruptions (SDCs), i.e., incorrect outputs. ...
doi:10.7873/date.2014.354
dblp:conf/date/Bautista-GomezCCDFGPRR14
fatcat:y476sawz3jgy5g4hox4iarldsy
MAVFI: An End-to-End Fault Analysis Framework with Anomaly Detection and Recovery for Micro Aerial Vehicles
[article]
2023
arXiv
pre-print
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We introduce MAVFI, the micro aerial vehicles (MAVs) resilience analysis methodology to assess the effect of silent data corruption (SDC) on UAVs' mission metrics, such as flight time and success rate, ...
INTRODUCTION Silent data corruptions (SDCs) have become an important problem [1] . It has been shown as a major issue for server scale systems [2] , [3] . ...
Prior works have evaluated data field impact on the processor and neural network [1] , and we further corroborate this in end-to-end UAV systems from the application-level perspective. ...
arXiv:2105.12882v3
fatcat:scvhlhvfb5avdiydscvgocskti
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