A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf
.
Filters
New Semiconductor Devices
2008
Acta Physica Polonica. A
Finally, the interest of advanced beyond-CMOS (complementary MOS) nanodevices for long term applications, based on nanowires, carbon electronics or small slope switch structures are presented. ...
Silicon on insulator-based devices seem to be the best candidates for the ultimate integration of integrated circuits on silicon. ...
Acknowledgments This work was partially supported by the European Networks of Excellence NANOSIL (FP7) and SINANO (FP6) devoted to silicon-based nanodevices. ...
doi:10.12693/aphyspola.114.945
fatcat:erxenkikfjb3xc623kalftblqe
The High-Mobility Bended n-Channel Silicon Nanowire Transistor
2010
IEEE Transactions on Electron Devices
This work demonstrates a method for incorporating strain in silicon nanowire gate-all-around (GAA) n-MOSFETs by oxidation-induced bending of the nanowire channel and reports on the resulting improvement ...
The maximum observed electron mobility enhancement is on the order of 100% for a gate bias near the threshold voltage. ...
In this work, we demonstrate how electron mobility can locally be enhanced in the GAA MOSFET channel by oxidation-induced bending, which introduces tensile strain in the channel. ...
doi:10.1109/ted.2010.2040939
fatcat:q32hfvs4vjfxjkpuv7qgzxfnnq
Technology and metrology of new electronic materials and devices
2007
Nature Nanotechnology
The development of new nanoscale electronic devices and materials places increasingly stringent requirements on metrology. ...
Beyond this timeframe, entirely new device structures (such as nanowire or molecular devices) and computational paradigms will almost certainly be needed to improve performance. ...
Acknowledgments The author acknowledges the support of the Jonsson School of Engineering at the University of Texas at Dallas, the NIST Offi ce of Microelectronics Programs, and the NIST Semiconductor Electronics ...
doi:10.1038/nnano.2006.142
pmid:18654203
fatcat:k6lxky3ycneyjdlvgmqaz2uafe
Quantum analysis based extraction of frequency dependent intrinsic and extrinsic parameters for GEWE-SiNW MOSFET
2017
Journal of Computational Electronics
In this paper, extrinsic parameters of Gate Electrode Workfunction Engineered (GEWE) Silicon Nanowire MOSFET are analyzed in terms of parasitics capacitances, resistances and inductances using 3D-TCAD ...
Simulation results reveal significant reduction in intrinsic and extrinsic parameters of GEWE-SiNW in comparison to its conventional SiNW MOSFET. ...
The Source/Drain region is highly doped with n-type impurity of 5×10 19 cm -3 . ...
doi:10.1007/s10825-016-0949-4
fatcat:vnk4tijlujh27d6x4sggwpbdpu
Keyword Index
2021
2021 IEEE Latin America Electron Devices Conference (LAEDC)
of Polarity Controllable-Diode Analysing the Efficiency Enhancement of Indoor Organic High mobility tfts Ferroelectric-Field Effect Transistor Under the Influence of High Mobility Hf-In-ZnO TFTs, with ...
integrated with a silicon nanowire biosensor Pvp Cross-linked poly(4-vinylphenol) in thin-film transistors for water analysis Q Quantum interference Electromagnetic Coherent Electron Control Quantum transport ...
doi:10.1109/laedc51812.2021.9437930
fatcat:3tanameu3fa6jiubgbtih53z4y
Mobility and transverse electric field effects in channel conduction of wrap-around-gate nanowire MOSFETs
2004
IEE Proceedings - Circuits Devices and Systems
In this paper we demonstrate that the current density is enhanced in nanowire channel WAG MOSFETs as a result of higher carrier mobilities. ...
The best fit is for the case where an n-type dopant is near the upper surface and decreases monotonically in the ydirection (Fig. 4) . ...
doi:10.1049/ip-cds:20040993
fatcat:pp7gffogcfbapgfs7y3gzvyx7u
DRAIN CURRENT CHARACTERISTICS OF SILICON NANOWIRE FIELD EFFECT TRANSISTOR
2016
ICTACT Journal on Microelectronics
Goodnick, and I.
of the drain voltage and is therefore a well-defined characteristic, Knezevic, “Electron Mobility in Silicon Nanowires”, IEEE
however it is less clear in modern nanometer-nanowire ...
First, they can be produced in high yield for electronic devices, such as MOSFETs and Nanowire
with reproducible electronic properties as per the requirements for transistors. ...
doi:10.21917/ijme.2016.0049
fatcat:4qnryqlog5h2jjeot57bti4ole
Dual Nanowire Silicon MOSFET With Silicon Bridge and TaN Gate
2008
IEEE transactions on nanotechnology
This paper demonstrates a high performance silicon nanowire mosfet built on silicon-on-insulator (SOI) platform. Stress-limiting oxidation technique was exploited for dual nanowire channel formation. ...
The thin silicon bridge between the two nanowires provides a small boost in the drive current, without degrading the short channel performance. ...
ACKNOWLEDGMENT The authors would like to thank the staffs of the Institute of Microelectronics (IME), Singapore, for their assistance in device fabrication. ...
doi:10.1109/tnano.2008.917845
fatcat:tp3tqpnzbzc55juqdq6o6picoi
Uniaxially tensile strained accumulation-mode gate-all-around Si nanowire nMOSFETs
2011
69th Device Research Conference
As Figure 6 shows, the electron mobility in highly doped AMOSFET is reducing as T -0.97 which is lower than for intrinsic or low n-doped Si and in agreement with prior reports [10], being explained by ...
As a conclusion, we have demonstrated the first AM gate-all-around nMOSFETs on SOI substrates with electron mobility enhanced by process-induced uniaxial tensile strain and reported their performance from ...
As Figure 6 shows, the electron mobility in highly doped AMOSFET is reducing as T -0.97 which is lower than for intrinsic or low n-doped Si and in agreement with prior reports [10], being explained by ...
doi:10.1109/drc.2011.5994458
fatcat:vrogy3c62zejnlkcmznldpsfzi
Technical Program
2021
2021 IEEE Latin America Electron Devices Conference (LAEDC)
and Edmundo Gutierrez
Trapping Induced Barrier Raising (TIBR) in
SOI MOSFETs
16:30
M
Toshiro Hiramoto
Recent Progress of Silicon IGBT technologies
17:00
M
Edward Yi Chang
An Enhancement-Mode ...
High Mobility Hf-In-ZnO TFTs, with HfO2 as Dielectric for Low Field Effect Transistor Evolution: From MOSFET to BioFET Field Effect Transistor Evolution: From MOSFET to BioFET Opportunities for Remote ...
doi:10.1109/laedc51812.2021.9437946
fatcat:7j6djeusvzg2jiiem7qibbqsg4
Materials and Devices for Nanoelectronic Systems Beyond Ultimately Scaled CMOS
[chapter]
2009
Nanosystems Design and Technology
We have addressed the issue of strain-induced mobility enhancement in silicon nanowires. ...
We have demonstrated enhanced electron mobility due to oxidation-induced tensile strain in GAA bent MOSFETs. ...
doi:10.1007/978-1-4419-0255-9_2
fatcat:jr5pdhrezngbtl6dd3gsrbwpni
A Compact Model of Silicon-Based Nanowire Field Effect Transistor for Circuit Simulation and Design
[article]
2014
arXiv
pre-print
In order to determine the effectiveness of the modeled diodes in silicon nanowire, the same diodes have been modeled using a germanium nanowire by selective doping and simulated in the same manner to obtain ...
As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits; many novel device structures are being extensively explored. ...
This crystal orientation leads to enhanced hole mobility but degraded electron mobility [25] . ...
arXiv:1407.2358v1
fatcat:tez6ce55zbd7jbxwy3rixvuhpm
Silicon Nanowire FinFETs
[chapter]
2012
Nanowires - Recent Advances
Hashemi, Gate-All-Around Silicon Nanowire MOSFETs: Top-down Fabrication and Transport Enhancement Techniques, PhD dissertation, Massachusetts Institute of Technology, 2010 [14] ). ...
GAA MOSFETs have potential to offer enhanced carrier transport properties compared to planar devices, because of the high carrier mobility on sidewall planes. ...
doi:10.5772/52591
fatcat:i3eocbcqdzec3emsal2fm4fsee
Comparitive study of electrical properties of carbon nano tube (CNT) and silicon nanowire (SNW) MOSFET devices
2019
Bayero Journal of Pure and Applied Sciences
Modelling of the device was done by choosing the device type (carbon nanotube and silicon nanowire gate MOSFET). 2. ...
capacitance and average velocity of mobile electron for carbon nanotube and silicon nanowire MOSFET devices via simulation with nanoelectronics device simulation software FETTOY. ...
doi:10.4314/bajopas.v11i1.9s
fatcat:6kplt25kyjgslbcaps4dnd3o7i
Simulation Study of Germanium p-Type Nanowire Schottky Barrier MOSFETs
2013
IEEE Electron Device Letters
Ambipolar currents in Germanium p-type nanowire Schottky barrier MOSFETs were calculated fully quantum-mechanically by using the multi-band k.p method and the non-equilibrium Green's function approach. ...
In comparison to Si as a channel material, Ge is more desirable because more current can be injected into the channel, resulting in steeper subthreshold slope and higher on-state current. ...
In the following, we first characterize the device performance of Ge p-type nanowire SB-MOSFETs. ...
doi:10.1109/led.2012.2237375
fatcat:jt4revthfnh5le6pqywdi7qlzq
« Previous
Showing results 1 — 15 out of 1,139 results