Bo Song
ABSTRACT
Recently, the great progress in the field of neuroscience has promoted the development of the implantable multichannel neural recording systems. It goes without saying that increasing the number of electrodes and channels of the systems does help the spatial revolution, however, which could also increase the the power consumption and the output data rate. This paper mainly focuses on the methods which are able to decrease the data transfer rate as well as the power consumption. In order to transfer the neural signals out of human body, the data converters are tended to be used to decrease the power consumption.
- Yazicioglu, R.F., , A 200 mu W Eight-Channel EEG Acquisition ASIC for Ambulatory EEG Systems. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43(12): p. 3025-3038.Google Scholar
Cross Ref
- Noshahr, F.H., M. Nabavi and M. Sawan, Multi-Channel Neural Recording Implants: A Review. SENSORS, 2020. 20(3).Google Scholar
- Gosselin, B., Recent Advances in Neural Recording Microsystems. SENSORS, 2011, 11(5): p. 4572-4597.Google Scholar
- Gosselin, B., , A Mixed-Signal Multichip Neural Recording Interface With Bandwidth Reduction. IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, 2009, 3(3): p. 129-141.Google ScholarCross Ref
- Gosselin, B., M. Sawan and E. Kerherve, Linear-Phase Delay Filters for Ultra-Low-Power Signal Processing in Neural Recording Implants. IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, 2010, 4(3): p. 171-180.Google ScholarCross Ref
- Aviyente, S., Compressed sensing framework for EEG compression. 2007, p. 181-184.Google ScholarDigital Library
- Donoho, D.L., Compressed sensing. IEEE TRANSACTIONS ON INFORMATION THEORY, 2006, 52(4): p. 1289-1306.Google ScholarDigital Library
- Shoaran, M., , Compact Low-Power Cortical Recording Architecture for Compressive Multichannel Data Acquisition. IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, 2014, 8(6): p. 857-870.Google ScholarCross Ref
- Chen, F., A.P. Chandrakasan and V.M. Stojanovic, Design and Analysis of a Hardware-Efficient Compressed Sensing Architecture for Data Compression in Wireless Sensors. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2012, 47(3): p. 744-756.Google ScholarCross Ref
- Gosselin, B., Recent Advances in Neural Recording Microsystems. SENSORS, 2011, 11(5): p. 4572-4597.Google Scholar
- Harrison, R.R., A low-power integrated circuit for adaptive detection of action potentials in noisy signals, in PROCEEDINGS OF ANNUAL INTERNATIONAL CONFERENCE OF THE IEEE ENGINEERING IN MEDICINE AND BIOLOGY SOCIETY. 2003, p. 3325-3328.Google Scholar
- Bonfanti, A., , A Multi-Channel Low-Power System-on-Chip for Single-Unit Recording and Narrowband Wireless Transmission of Neural Signal, in IEEE Engineering in Medicine and Biology Society Conference Proceedings. 2010, p. 1555-1560.Google Scholar
- Haas, A.M., M.H. Cohen and P.A. Abshire, Real-time variance based template matching spike sorting system. 2007, p. 104-+.Google ScholarCross Ref
- Harrison, R.R., , A low-power integrated circuit for a wireless 100-electrode neural recording system. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42(1): p. 123-133.Google ScholarCross Ref
- Kamboh, A.M., K.G. Oweiss and A.J. Mason, Resource Constrained VLSI Architecture for Implantable Neural Data Compression Systems. 2009, p. 1481-1484.Google Scholar
- R., O. and W. K. A three-dimensional neural recording microsystem with implantable data compression circuitry. in ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.Google Scholar
- Khazaei, Y. and A.M. Sodagar, Multi-Channel ADC with Improved Bit Rate and Power Consumption for ElectroCorticoGraphy Systems, in Biomedical Circuits and Systems Conference, 2019.Google ScholarCross Ref
Recommendations
A 14b 150 MS/s 140 mW 2.0 mm2 0.13µm CMOS A/D converter for software-defined radio systems
This work proposes a 14 b 150 MS/s CMOS A/D converters (ADC) for software-defined radio systems requiring simultaneously high-resolution, low-power, and small chip area at high speed. The proposed calibration-free ADC employs a wide-band low-noise input ...
A 10 b 25 MS-s 4.8 mW 0.13 µm CMOS ADC with switched-bias power-reduction techniques
This paper proposes a 10 b 25 MS-s 4.8 mW 0.13 µm CMOS analog-to-digital converter (ADC) for high-performance portable wireless communication systems, such as digital video broadcasting, digital audio broadcasting, and digital multimedia broadcasting (...
A continuous-time delta-sigma ADC for portable ultrasound scanners
A fully differential fourth-order 1-bit continuous-time delta-sigma ADC designed in a 65 nm process for portable ultrasound scanners is presented in this paper. The circuit design, implementation and measurements on the fabricated die are shown. The ...
Comments