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"Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder ..."

Partha Bhattacharyya et al. (2015)

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DOI: 10.1109/TVLSI.2014.2357057

access: closed

type: Journal Article

metadata version: 2020-12-29

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Partha Bhattacharyya, Bijoy Kundu, Sovan Ghosh, Vinay Kumar, Anup Dandapat:
Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2001-2008 (2015)

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