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Topology synthesis of analog circuits based on adaptively generated building blocks
2008
Proceedings of the 45th annual conference on Design automation - DAC '08
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This paper presents an automated analog synthesis tool for topology generation and subsequent circuit sizing. Though sizing is indispensable, the paper mainly concentrates on topology generation. ...
A new kind of GA is developed, where a fraction of the offsprings in each generation is built from building blocks or cells obtained from previous generations. ...
In an attempt to alleviate all of the above drawbacks, we introduce a GA-based framework for topology synthesis of analog circuits. ...
doi:10.1145/1391469.1391483
dblp:conf/dac/DasV08
fatcat:33td76apujew3iyfacvp7ihmza
ATLAS: An adaptively formed hierarchical cell library based analog synthesis framework
2008
2008 IEEE International Symposium on Circuits and Systems
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This paper presents ATLAS -a framework for automated analog circuit synthesis that comprises of both topology generation and subsequent circuit sizing. ...
A hierarchically arranged building block or cell library is used in this regard. ...
The main heuristic behind adaptivity is that the fitness of the present circuit produced decides on how well its building blocks qualify to be prospective cells for future generations of circuits. ...
doi:10.1109/iscas.2008.4541974
dblp:conf/iscas/DasV08
fatcat:ft3vp6ztv5b5lejfcndtgjqobe
A graph grammar based approach to automated multi-objective analog circuit design
2009
2009 Design, Automation & Test in Europe Conference & Exhibition
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This paper introduces a graph grammar based approach to automated topology synthesis of analog circuits. ...
The synthesis has been sped up by using dynamically obtained designsuitable building blocks. ...
Considering all of the above drawbacks, we introduce a graph grammar based approach for the generation of transistorlevel analog circuit topologies. ...
doi:10.1109/date.2009.5090755
dblp:conf/date/DasV09
fatcat:rlsszsa2v5gapmfo7wooctze5e
DARWIN: CMOS opamp Synthesis by Means of a Genetic Algorithm
1995
Proceedings - Design Automation Conference
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A randomly generated initial set of opamps evolves to a set in which the topologies as well as the transistor sizes of the opamps are adapted to the required performance specifications. ...
DARWIN is a tool that is able to synthesize CMOS opamps, on the basis of a genetic algorithm. ...
CONCLUSIONS We described a way to synthesize analog circuits, based on genetic algorithms. ...
doi:10.1109/dac.1995.249986
fatcat:h6fqyrdclbdfjcvjagmzvzlfw4
DARWIN
1995
Proceedings of the 32nd ACM/IEEE conference on Design automation conference - DAC '95
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A randomly generated initial set of opamps evolves to a set in which the topologies as well as the transistor sizes of the opamps are adapted to the required performance specifications. ...
DARWIN is a tool that is able to synthesize CMOS opamps, on the basis of a genetic algorithm. ...
CONCLUSIONS We described a way to synthesize analog circuits, based on genetic algorithms. ...
doi:10.1145/217474.217566
dblp:conf/dac/KruiskampL95
fatcat:lvtvsmmporbn7eyca6sl46gxlm
Fuzzy Logic Based Guidance to Graph Grammar Framework for Automated Analog Circuit Design
2009
2009 22nd International Conference on VLSI Design
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The grammar generates circuit topologies through a derivation tree. To boost this tree based synthesis mechanism, smaller building blocks in the form of subtrees have been used for the purpose. ...
This paper introduces a fuzzy logic based guidance architecture to a graph grammar framework for automated design of analog circuits. ...
In a pursuit to overcome all of the above drawbacks, we introduce a graph grammar based framework for the generation of analog circuit topologies. ...
doi:10.1109/vlsi.design.2009.79
dblp:conf/vlsid/DasV09
fatcat:lvd423wwo5exzoatxqtclpsk7m
Trustworthy Genetic Programming-Based Synthesis of Analog Circuit Topologies Using Hierarchical Domain-Specific Building Blocks
2011
IEEE Transactions on Evolutionary Computation
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In analog topology design, the aim is to generate a graph-like structure of devices (resistors, Manuscript ...
The search space is defined by a set of expert-specified, trusted, hierarchically-organized analog building blocks, which are organized as a parameterized context-free grammar. ...
MOJITO is demonstrated in the problem domain of analog circuit topology synthesis. ...
doi:10.1109/tevc.2010.2093581
fatcat:lqqdtzowrjdjbftkx2gc3netfq
An FPAA Approach to Adaptive Filter Design with Evolutionary Software-driven Reconfiguration
2014
Elektronika ir Elektrotechnika
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The target is the development of fully adaptive mixed-signal systems on a chip, with a conclusive example found in the field of radio communications. ...
This paper proposes an auto-adaptive filter developed for analog filtering in next-generation intelligent multi-mode wireless receivers. ...
Section II presents the proposed FPAA developed for auto-adaptive IF analog filters, describing the FPAA topology, the FPAA building blocks and the on-chip wideband self-calibration circuit built with ...
doi:10.5755/j01.eee.20.5.5579
fatcat:twkmsgm2pfatlbv2staolgo2na
Generator based approach for analog circuit and layout design and optimization
2011
2011 Design, Automation & Test in Europe
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This paper presents a new methodology for layout generation of analog circuits that is based on a modular circuit design and a so-called "executable design flow description". ...
Layout generation remains a critical bottleneck in analog circuit design. ...
ACKNOWLEDGMENT This work is supported by the German Ministry of Education and Research BMBF under grant number 01M3086. ...
doi:10.1109/date.2011.5763267
dblp:conf/date/GraupnerJW11
fatcat:4uaz7rvccnhqbpyaknojyttz4i
Variation-Aware Structural Synthesis of Analog Circuits via Hierarchical Building Blocks and Structural Homotopy
2009
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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It returns trustworthy topologies, by searching across a space of thousands of possible topologies defined by hierarchicallyorganized analog structural building blocks. ...
This paper presents MOJITO-R, a tool that performs variation-aware structural synthesis of analog circuits. ...
(-R) for trustworthy-by-construction analog topology synthesis. A small library of analog structural building blocks combine hierarchically to create a massive library of possible topologies. ...
doi:10.1109/tcad.2009.2023195
fatcat:zx2srxbafjdkjd5mj2rejuub2m
FEATS: Framework for Explorative Analog Topology Synthesis
2015
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Due to the availability of commercial sizing tools, this work deliberately focuses on the construction of circuit topologies in distinction to parameter synthesis, which can be obtained with a dedicated ...
Therefore, a framework was developed to provide the necessary mechanisms in order to carry out a fully automated analog circuit synthesis, i.e., the construction of an analog circuit fulfilling all previously ...
Circuit Isomorphism A basic block based circuit synthesis inevitably leads to the generation of multiple identical circuits. ...
doi:10.1109/tcad.2014.2376987
fatcat:paqpx4vhxrba5dwczcoewyg7ry
GRACE: Generative Robust Analog Circuit Exploration
[chapter]
2006
Lecture Notes in Computer Science
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We motivate and describe an analog evolvable hardware design platform named GRACE (i.e. Generative Robust Analog Circuit Exploration). ...
GRACE combines coarse-grained, topological circuit search with intrinsic testing on a Commercial Off-The-Shelf (COTS) field programmable device, the Anadigm AN221E04. ...
Acknowledgements We would like to thank Anadigm, Dimitri Berensen, Garrison Greenwood, David Hunter, Didier Keymeulen, Adrian Stoica, and Eduardo Torres-Jara for their contributions to the development of ...
doi:10.1007/11732242_30
fatcat:z5hpll7az5cclhpkewitpatafy
An Efficient Methodology for Hierarchical Synthesis of Mixed-Signal Systems with Fully Integrated Building Block Topology Selection
2007
2007 Design, Automation & Test in Europe Conference & Exhibition
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of lower-level building block topologies. ...
The generated system designs can contain all kinds of topology combinations as long as critical inter-block constraints are met. ...
To categorize the existing analog synthesis tools, first two tasks in the synthesis process have to be distinguished; the selection of a topology and the sizing of that selected topology. ...
doi:10.1109/date.2007.364571
dblp:conf/date/EeckelaertSGSS07
fatcat:2essm2bbh5egjdvn3swsuvqdwu
ComputerAided Design of Analog and MixedSignal Integrated Circuits
[chapter]
2009
Computer-Aided Design of Analog Integrated Circuits and Systems
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Analog blocks typically constitute only a small fraction of the components on mixed-signal ICs and emerging systems-on-a-chip (SoC) designs. ...
Keywords-Analog and mixed-signal computer-aided design (CAD), analog and mixed-signal integrated circuits, analog circuit and layout synthesis, analog design automation, circuit simulation and modeling ...
topology are determined based on the specifications of the overall block. ...
doi:10.1109/9780470544310.ch1
fatcat:nz4on5owvvdxbneeuh3aqrkkfe
Computer-aided design of analog and mixed-signal integrated circuits
2000
Proceedings of the IEEE
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Analog blocks typically constitute only a small fraction of the components on mixed-signal ICs and emerging systems-on-a-chip (SoC) designs. ...
Keywords-Analog and mixed-signal computer-aided design (CAD), analog and mixed-signal integrated circuits, analog circuit and layout synthesis, analog design automation, circuit simulation and modeling ...
topology are determined based on the specifications of the overall block. ...
doi:10.1109/5.899053
fatcat:2kjzezalevhuzayfrkykyvm5py
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