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A router architecture for flexible routing and switching in multihop point-to-point networks

S.W. Daniel, K.G. Shin, Sang Kyun Yun
1999 IEEE Transactions on Parallel and Distributed Systems  
Using this, we present a flexible router whose routing and switching policies can be tailored to the application, allowing the network to meet these diverse needs.  ...  These diverse characteristics affect the performance and suitability of particular routing and switching policies in multihop point-to-point networks.  ...  We would like to thank James Dolter (one of the original PRC architects) and Jennifer Rexford for their invaluable contributions to this work, and Sung-Whan Moon for testing the fabricated PRC.  ... 
doi:10.1109/71.744841 fatcat:dtrg2awoabhydnhqwjjezjvexa

pp-mess-sim: a flexible and extensible simulator for evaluating multicomputer networks

J. Rexford, Wu-Chang Feng, J. Dolter, K.G. Shin
1997 IEEE Transactions on Parallel and Distributed Systems  
Sample simulation experiments capitalize on this flexibility to compare network architectures under various application workloads.  ...  Besides providing a general framework for evaluating router architectures, ppmess-sim includes a cycle-level model of the PRC, a programmable router for point-to-point distributed systems.  ...  ACKNOWLEDGMENTS The work reported in this paper was supported in part by the U.S. National Science Foundation under Grant MIP-9203895.  ... 
doi:10.1109/71.569653 fatcat:u47by6qsbbhbnbfa2vs7xd5agy

A delay model for router microarchitectures

Li-Shiuan Peh, W.J. Dally
2001 IEEE Micro  
Miller and Najjar extended Chien's model for virtual cut-through routers, modifying the parameterized delay equation for T FC to include the parameter B, the number of buffers in that input queue [6].  ...  In this paper, we describe a router delay model that accurately accounts for pipelining based on technology-independent delay estimates derived through detailed gate-level analysis.  ...  Canonical router architectures First, the model proposes canonical router architectures which are tailored to each flow control technique.  ... 
doi:10.1109/40.903059 fatcat:lihdifba5ndupijtukmob45c2y

A CASE STUDY ON CLUSTER BASED POWER-AWARE MAPPING STRATEGY FOR 2D NoC

Salini S, Aravindhan A, Lakshminarayanan G
2017 ICTACT Journal on Microelectronics  
Application mapping is one of the major challenges in NoC which maps the various Intellectual Property (IP) cores to standard network topology.  ...  Network on Chip (NoC) is a growing and prominent paradigm which improves the power and performance of the System on Chip (SoC).  ...  ACKNOWLEDGEMENT The authors would like to thank Facility for Advanced Computing Testing and Simulation of Electronic Circuit (FACTS ElCi) for providing the lab facility for our research work.  ... 
doi:10.21917/ijme.2017.0055 fatcat:syo6jvfi6jhbfmz646za4i7kpu

SMART: A Single-Cycle Reconfigurable NoC for SoC Applications

Chia-Hsin Owen Chen, Sunghyun Park, Tushar Krishna, Suvinay Subramanian, Anantha P. Chandrakasan, Li-Shiuan Peh
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013  
All other benchmarks' bandwidth remain unchanged. 10 In the worst case, if all flows contend, SMART and Mesh will have the same network latency. 11 Essentially, this increases the radix of the router and  ...  We implement the SMART NoC to layout and show that SMART NoC gives 60% latency savings, and 2.2X power savings compared to a baseline mesh NoC. 9 The bandwidth requirements of the three MMS benchmarks  ...  ACKNOWLEDGEMENT The authers acknowledge the support of DARPA under the Ubiquitous High-Performance Computing (UHPC) program, and Michel Kinsy from MIT for providing H264 task graph.  ... 
doi:10.7873/date.2013.080 dblp:conf/date/ChenPKSCP13 fatcat:lrjfa2wboba2nnj2br5rsnt3jq

Mapping a Pipelined Data Path onto a Network-on-Chip

Stephan Kubisch, Claas Cornelius, Ronald Hecht, Dirk Timmermann
2007 2007 International Symposium on Industrial Embedded Systems  
This is done in the light of preliminary investigations for the redesign of an existing packet processing system because that system's current architecture exhibits drawbacks regarding performance and  ...  Therefore, we considered to take advantage of an NoC communication architecture. A simple NoC was developed, which knowingly omits sophisticated QoS mechanisms.  ...  ACKNOWLEDGMENT We thank Nokia Siemens Networks, location Greifswald, Germany, for supporting the MATMUNI project.  ... 
doi:10.1109/sies.2007.4297333 dblp:conf/sies/KubischCHT07 fatcat:mjezkhue35dcfftlzmro6pq5pm

Next-generation IP switches and routers

H.J. Chao, M. Degermark, N. McKeown, H.H.-Y. Tzeng
1999 IEEE Journal on Selected Areas in Communications  
Their "flow aggregated traffic driven" policy effectively reduces the number of required labels and increases the cut-through ratio.  ...  ROUTER ARCHITECTURES New router architectures are introduced to meet the demand of the ever-growing bandwidth requirement of the Internet.  ...  He is currently working on high-performance routing technologies, such as fast-search algorithms, link-state routing, and inter-domain routing protocols, in addition to his publications on reliable multicast  ... 
doi:10.1109/jsac.1999.772425 fatcat:vvp2ipv4pbhf3ecn2hh3iy2cze

Ring-Mesh: A Scalable and High-Performance Approach for Manycore Accelerators [article]

Somnath Mazumdar, Alberto Scionti
2019 arXiv   pre-print
In this paper, we propose a scalable and efficient Network-on-Chip (NoC) architecture fusing the advantages of rings as well as the 2D-mesh without using any bridge router to provide high-performance.  ...  Simulation results show better scalability (up to 1024 processing elements) with robust performance in multiple statistical traffic pattern scenarios.  ...  To this end, the data packet structure along with the micro-architecture of the routers/switches have been tailored to provide a good trade-off between efficiency, performance and flexibility.  ... 
arXiv:1904.03428v1 fatcat:avwhcxwgkzfc5ma5uwcimiex34

Investigational Security Structural Design Using Client and Server Ambitious Protocols for WMN

Selvakani Kandeeban, N Suresh Kumar
2015 International Journal of Informatics and Communication Technology (IJ-ICT)  
<p>Wireless mesh network plays an vital role in our day to day life, Networks are mainly used to deliver voice, video and data but using WMN's we can communicate in outdoor environments without wired.  ...  In order to provide a better understanding of the research challenges of WMNs, In this paper we propose MobiSEC, a complete security architecture protocols and algorithms for WMNs that provides both access  ...  CONCLUSION In this paper we proposed MobiSEC, a novel security architecture tailored for wireless mesh networks.  ... 
doi:10.11591/ijict.v4i1.pp13-22 fatcat:zm2ydqpddvf4hkotxb72rq2pj4

aItPm

Guru Parulkar, Douglas C. Schmidt, Jonathan S. Turner
1995 Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication - SIGCOMM '95  
We believe that the a]tpm architecture will not only lead to a scalable high-performance gigabit IP router technology, but will also demonstrate that IP and ATM technologies can be mutually supportive.  ...  This altpm (pronounced "IP on ATM" or, if you prefer, "ip-attem") architecture provides flexibility in congestion control, routing, resource management, and packet scheduling. Tbe a?  ...  Thanks also to Han Adiseshu of Washington University for assistance in clarifying certain details of IP version 6 and helping with the figures.  ... 
doi:10.1145/217382.217409 dblp:conf/sigcomm/ParulkarST95 fatcat:wvcohuby3zfwre4352e76ihkti

aItPm

Guru Parulkar, Douglas C. Schmidt, Jonathan S. Turner
1995 Computer communication review  
We believe that the a]tpm architecture will not only lead to a scalable high-performance gigabit IP router technology, but will also demonstrate that IP and ATM technologies can be mutually supportive.  ...  This altpm (pronounced "IP on ATM" or, if you prefer, "ip-attem") architecture provides flexibility in congestion control, routing, resource management, and packet scheduling. Tbe a?  ...  Thanks also to Han Adiseshu of Washington University for assistance in clarifying certain details of IP version 6 and helping with the figures.  ... 
doi:10.1145/217391.217409 fatcat:u3x4qcx7dvbehozzw6vh4cxd74

Flexible, Dynamic, and Scalable Service Composition for Active Routers [chapter]

Stefan Schmid, Tim Chart, Manolis Sifalakis, Andrew C. Scott
2002 Lecture Notes in Computer Science  
The composition model promotes transparent and dynamic creation of network-side services and allows independent users to partake in this process.  ...  We show that the overhead of this composition model does not significantly affect the performance of the router.  ...  For packets that do not require active processing, cut-through paths in the classification graph can further reduce that latency.  ... 
doi:10.1007/3-540-36199-5_20 fatcat:vcmsao6t4nee7fpz5gvy4iacge

Application driven evaluation of network on chip architectures forcation parallel signal processing

C. Neeb, M. J. Thul, N. Wehn
2005 Advances in Radio Science  
The evaluation of candidate network architectures is based on performance measures and implementation cost to allow a fair trade-off.  ...  Turbo-Codes as an instance of highly efficient forward-error correction codes are a very good application to demonstrate the communication complexity in parallel architectures.  ...  To rate the various network architectures in terms of performance, we derive a model to capture the interleaving specific requirements and to quantify the impact on the overall decoder.  ... 
doi:10.5194/ars-2-181-2004 fatcat:tq5ustmoundzzaq666fu74njha

GridSec: Trusted Grid Computing with Security Binding and Self-defense Against Network Worms and DDoS Attacks [chapter]

Kai Hwang, Yu-Kwong Kwok, Shanshan Song, Min Cai Yu Chen, Ying Chen, Runfang Zhou, Xiaosong Lou
2005 Lecture Notes in Computer Science  
The USC GridSec project develops distributed security infrastructure and self-defense capabilities to secure wide-area networked resource sites participating in a Grid application.  ...  Specifically, we present a new pushback scheme for tracking attack-transit routers and for cutting malicious flows carrying DDoS attacks.  ...  It only requires O(log log N) storage capacity for N packets or flows on each router [5, 9] , compared with the O(N) complexity in using a Bloom filter [2] .  ... 
doi:10.1007/11428862_27 fatcat:ppfr53usq5babcxoizr32k4tny

Generic Low-Latency NoC Router Architecture for FPGA Computing Systems

Ye Lu, John McCanny, Sakir Sezer
2011 2011 21st International Conference on Field Programmable Logic and Applications  
It can also be configured in various network topologies including 1-D, 2-D, and 3-D.  ...  designs -whilst being very competitive in terms of performance and hardware complexity.  ...  For example, to forward a packet from the top left corner to the bottom right corner in a 4 × 4 2-D mesh network requires 7 hops but only 3 hops in the hybrid global mesh and local star network.  ... 
doi:10.1109/fpl.2011.25 dblp:conf/fpl/LuMS11 fatcat:itdlmvmyibenrjtmhxk3dyc6ei
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