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Short-Term Depression in VLSI Stochastic Synapse
2008
Neural Information Processing Systems
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We report a compact realization of short-term depression (STD) in a VLSI stochastic synapse. The behavior of the circuit is based on a subtractive single release model of STD. ...
The dynamic stochastic synapse could potentially be a powerful addition to existing deterministic VLSI spiking neural systems. ...
However, the application of such dynamic stochastic synapses in large networks still remains a challenge. ...
dblp:conf/nips/XuHA08
fatcat:anav2jmxhbdd5agjtakge3tj6a
Neuromorphic Bistable VLSI Synapses with Spike-Timing-Dependent Plasticity
2002
Neural Information Processing Systems
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In these types of synapses, the short-term dynamics of the synaptic efficacies are governed by the relative timing of the pre-and post-synaptic spikes, while on long time scales the efficacies tend asymptotically ...
We fabricated a prototype VLSI chip containing a network of integrate and fire neurons interconnected via bistable STDP synapses. ...
And if the short-term dynamics drive V w0 below threshold, we say that long-term depression (LTD) has been induced. ...
dblp:conf/nips/Indiveri02
fatcat:cbhgj5agpfailbcm5negl6cvj4
A configurable analog VLSI neural network with spiking neurons and self-regulating plastic synapses
2007
Neural Information Processing Systems
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We summarize the implementation of an analog VLSI chip hosting a network of 32 integrate-and-fire (IF) neurons with spike-frequency adaptation and 2,048 Hebbian plastic bistable spike-driven stochastic ...
synapses endowed with a selfregulating mechanism which stops unnecessary synaptic changes. ...
For the recurrent synapses, each impinging spike triggers short-time (and possibly long-term) changes in the state of the synapse, as detailed below. ...
dblp:conf/nips/GiulioniPBDG07
fatcat:zoy4anaf4vbyjfi7kjto6qbnw4
Spike-based learning in VLSI networks of integrate-and-fire neurons
2007
2007 IEEE International Symposium on Circuits and Systems
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We propose a spike-based learning algorithm that is highly effective in classifying complex patterns in semi-supervised fashion, and present neuromorphic circuits that support its VLSI implementation. ...
network of integrate-and-fire neurons and plastic synapses. ...
ACKNOWLEDGMENT The design of the VLSI chip and the experimental measurements were done together with Srinjoy Mitra. ...
doi:10.1109/iscas.2007.378290
dblp:conf/iscas/IndiveriF07
fatcat:4wenzwug7zbtjoaboszz4e6mom
A Neuromorphic aVLSI network chip with configurable plastic synapses
2007
7th International Conference on Hybrid Intelligent Systems (HIS 2007)
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synapses implementing a self-regulated form of Hebbian, spike-driven, stochastic plasticity. ...
We describe and demonstrate the key features of a neuromorphic, analog VLSI chip (termed F-LANN) hosting 128 integrate-and-fire (IF) neurons with spike-frequency adaptation, and 16 384 plastic bistable ...
in VLSI technology. ...
doi:10.1109/his.2007.60
dblp:conf/his/CamilleriGDBIMBG07
fatcat:3fhmt2l7szbf5mb3glen52howe
A Neuromorphic aVLSI network chip with configurable plastic synapses
2007
7th International Conference on Hybrid Intelligent Systems (HIS 2007)
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synapses implementing a self-regulated form of Hebbian, spike-driven, stochastic plasticity. ...
We describe and demonstrate the key features of a neuromorphic, analog VLSI chip (termed F-LANN) hosting 128 integrate-and-fire (IF) neurons with spike-frequency adaptation, and 16 384 plastic bistable ...
in VLSI technology. ...
doi:10.1109/ichis.2007.4344067
fatcat:kgtcmmuakraxbcddllx2uhkjle
A VLSI network of spiking neurons with plastic fully configurable "stop-learning" synapses
2008
2008 15th IEEE International Conference on Electronics, Circuits and Systems
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We describe and demonstrate a neuromorphic, analog VLSI chip (termed F-LANN) hosting 128 integrate-andfire (IF) neurons with spike-frequency adaptation, and 16,384 plastic bistable synapses implementing ...
The initial state of each synapse can be set as potentiated or depressed, and the state of each synapse can be read and stored on a computer. ...
Associative learning in networks of spiking IF neurons with stochastic synapses has been studied both in simulation [3] , [4] , [5] and in neuromorphic realizations [6] , [7] . ...
doi:10.1109/icecs.2008.4674944
dblp:conf/icecsys/GiulioniCDBIBG08
fatcat:fx4oqbj63vcbfcbm7b2x6cgctm
Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems
2014
Proceedings of the IEEE
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In particular, we review neuromorphic circuits for emulating neural and synaptic dynamics in real-time and discuss the role of biophysically realistic temporal dynamics in hardware neural processing architectures ...
In this paper we propose a set of neuromorphic engineering solutions to address this challenge. ...
These shortterm dynamic mechanisms are subdivided into short-term depression and short-term facilitation. ...
doi:10.1109/jproc.2014.2313954
fatcat:qbbuxacqtvci5ceffnqsjdif3y
A VLSI Array of Low-Power Spiking Neurons and Bistable Synapses With Spike-Timing Dependent Plasticity
2006
IEEE Transactions on Neural Networks
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Index Terms-Address-event representation (AER), analog VLSI, integrate-and-fire (I&F) neurons, neuromorphic circuits, spike-based learning, spike-timing dependent plasticity (STDP). ...
We describe the analog circuits designed to implement the silicon neurons and synapses and present experimental data showing the neuron's response properties and the synapses characteristics, in response ...
Fig. 7(a) shows spike traces obtained by stimulating an excitatory synapse with a 100-Hz input spike train, for three different values of the short-term depression bias . ...
doi:10.1109/tnn.2005.860850
pmid:16526488
fatcat:qokwoqhij5a6ro6yv237hdqtaa
A hybrid analog/digital Spike-Timing Dependent Plasticity learning circuit for neuromorphic VLSI multi-neuron architectures
2014
2014 IEEE International Symposium on Circuits and Systems (ISCAS)
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In this paper we present an analog/digital Spike-Timing Dependent Plasticity (STDP) circuit that changes its internal state in a continuous analog way on short biologically plausible time scales and drives ...
Finally we discuss the use of stochastic learning methods that can best exploit the properties of this circuit for implementing robust machine-learning algorithms. ...
then the output current I_syn is zero (the synapse is in a Long-Term Depressed -LTD-state); conversely if Vc>wthr! ...
doi:10.1109/iscas.2014.6865270
dblp:conf/iscas/MostafaCSI14
fatcat:gz4jvzjj2ngungmq27g3kg523a
Magnetic Tunnel Junction Based Long-Term Short-Term Stochastic Synapse for a Spiking Neural Network with On-Chip STDP Learning
2016
Scientific Reports
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Additionally, we present a significance driven long-term short-term stochastic synapse comprising two unique binary synaptic elements, in order to improve the synaptic learning efficiency. ...
This is inspired by the long-term and short-term partitions constituting the human memory 14 . ...
Acknowledgements The work was supported in part by, Center for Spintronic Materials, Interfaces, and Novel Architectures (C-SPIN), a MARCO and DARPA sponsored StarNet center, by the Semiconductor Research ...
doi:10.1038/srep29545
pmid:27405788
pmcid:PMC4942786
fatcat:bwz33kjxo5fkpbi4f26b2adp4m
Integration of nanoscale memristor synapses in neuromorphic computing architectures
2013
Nanotechnology
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In particular, memristors are regarded as a promising solution for modeling key features of biological synapses due to their nanoscale dimensions, their capacity to store multiple bits of information per ...
circuit which represents a radical departure from conventional neuro-computing approaches, as it uses memristors to directly emulate the biophysics and temporal dynamics of real synapses. ...
Acknowledgment This work was supported by the European CHIST-ERA program, via the "Plasticity in NEUral Memristive Architectures" (PNEUMA) project. ...
doi:10.1088/0957-4484/24/38/384010
pmid:23999381
fatcat:6isdvp5f4vhgddskpmlx2xq5ra
Neuromorphic computing enabled by physics of electron spins: Prospects and perspectives
2018
Applied Physics Express
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can directly mimic the functionalities of the computational primitives in neuromorphic computation, i.e., the neurons and synapses. ...
Such an approach is expected to play a key role in circumventing the problems of ever-increasing power dissipation and hardware requirements for implementing neuro-inspired algorithms in conventional digital ...
Acknowledgments The work was supported in part by the Center for Spintronic Materials, Interfaces, and Novel Architectures (C-SPIN), a MARCO and DARPA sponsored StarNet center, by the Semiconductor Research ...
doi:10.7567/apex.11.030101
fatcat:43bf7rfirjahho7sx4gqcsvh5e
Spike-Driven Synaptic Plasticity: Theory, Simulation, VLSI Implementation
2000
Neural Computation
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The model of the synapse is implemented in aVLSI and consists of only 18 transistors. It is also directly simulated. ...
Low transition probabilities can be maintained in all ranges, even though the intrinsic time constants of the device are short (∼ 100 ms). ...
This work has been supported in part by a grant from the Israel Fund for Basic Research. ...
doi:10.1162/089976600300014917
pmid:11032032
fatcat:nt23xdkgp5cgpe57h7qro7ffjq
Compensating Inhomogeneities of Neuromorphic VLSI Devices Via Short-Term Synaptic Plasticity
2010
Frontiers in Computational Neuroscience
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As a first approach of this kind in engineering practice, the short-term synaptic depression and facilitation mechanisms implemented within an analog VLSI model of I&F neurons are functionally utilized ...
Recent developments in neuromorphic hardware engineering make mixed-signal VLSI neural network models promising candidates for neuroscientific research tools and massively parallel computing devices, especially ...
Each synapse driver can either be run in facilitation or in depression mode or simply emulate static synapses without short-term dynamics. ...
doi:10.3389/fncom.2010.00129
pmid:21031027
pmcid:PMC2965017
fatcat:ekfssfxqubcmldhhwvwaw7f324
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