A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
Filters
BIST Method for Die-Level Process Parameter Variation Monitoring in Analog/Mixed-Signal Integrated Circuits
2007
2007 Design, Automation & Test in Europe Conference & Exhibition
Preserved Fulltext
The objective of this test is not to replace traditional specification-based tests, but to provide a reliable method for early identification of excessive process parameter variations in production tests ...
that allows quickly discarding of the faulty circuits. ...
Acknowledgements The authors acknowledge the contributions of E. van Tuijl, S. Krishnan, L. van de Logt and G. Gronthoud. ...
doi:10.1109/date.2007.364477
fatcat:jid6paxzmzathlkqbhdqpedg3i
Recent Advances in Analog, Mixed-Signal, and RF Testing
2010
IPSJ Transactions on System LSI Design Methodology
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2011; you can also visit the original URL.
The file type is application/pdf.
However, with the higher level of integration and increased diversity of specifications for measurement, specification-based testing is becoming increasingly difficult and costly. ...
This paper provides an overview of cost-effective test techniques that either enhance circuit testability, or enable built-in self-test (BIST) for integrated AMS/RF frontends. ...
and RF Testing
Recent Advances in Analog, Mixed-Signal, and RF Testing
Recent Advances in Analog, Mixed-Signal, and RF Testing ...
doi:10.2197/ipsjtsldm.3.19
fatcat:ta4eaij36vft7f6qkjvxbmpz4u
Multi-condition alternate test of analog, mixed-signal, and RF systems
2012
2012 13th Latin American Test Workshop (LATW)
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
For the sake of validation, the proposed methodology has been applied to several alternate test strategies for analog, mixed signal, and RF circuits. ...
The ambition of this paper is to be a methodological contribution to the field of AMS-RF test, and formal guidelines are provided that justify the interest of the approach. ...
INTRODUCTION Nowadays, commercial trends of IC industry have forced the integration of complex SoCs consisting of tightly integrated analog, mixed-signal, RF and digital circuitry onto a single IC substrate ...
doi:10.1109/latw.2012.6261248
dblp:conf/latw/AsianLH12
fatcat:udmkzjimhzdgvamt65ld3laqpa
Verification of Complex Analog Integrated Circuits
2006
IEEE Custom Integrated Circuits Conference 2006
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
Functional complexity in analog, mixed-signal, and RF (A/RF) designs is increasing dramatically. ...
A/RF designs implement many modes of operation for different standards, power saving modes, and calibration. ...
Introduction During the past decade, analog, mixed-signal, and radio frequency (A/ RF) design has undergone dramatic changes primarily driven by the competitive pressures of the consumer marketplace. ...
doi:10.1109/cicc.2006.320883
dblp:conf/cicc/KundertC06
fatcat:2hkitaoatnfxfc6svwltypdu2q
NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report
[article]
2023
arXiv
pre-print
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2023; you can also visit the original URL.
The file type is application/pdf.
As the pace of progress that has followed Moore's law continues to diminish, it is critical that the US support Integrated Circuit (IC or chip) education and research to maintain technological innovation ...
The NCDC should also provide access and support for chip fabrication, packaging and testing for both research and educational purposes. ...
Newer technologies are needed to push the boundaries in high-performance digital and wideband analog/mixed-signal/RF circuits. ...
arXiv:2311.02055v1
fatcat:qbuvxuzsbbgjbhp6fmepk63nnq
An Integrated Detection Circuit for Transmission Coefficients
2019
IEEE Access
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
To verify the feasibility of the circuit, we fabricated the test chips by using the 0.18-µm IBM 7RF process. ...
The traditional way to measure the S-parameters of RF integrated circuits (RFICs) is by using vector network analyzers (VNA). ...
Their comments have been very constructive, helping us to improve the quality of the article. ...
doi:10.1109/access.2019.2961943
fatcat:wp3jev2twrdknn2dvkg7riq2hu
Efficient, sound formal verification for analog/mixed-signal circuits
2016
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
With the language for analog/mixed-signal properties (LAMP), one has a simple intuitive language for specifying AMS properties. ...
The results are known as digitally-intensive analog/mixed-signal (AMS) circuits. Though such circuits have helped the scaling problem, they have further complicated verification. ...
To cope with this challenge, analog designers have turned to digital alternatives as much as possible resulting in analog/mixed-signal circuits (AMS). ...
doi:10.26053/0h-bk08-vsg0
fatcat:4hxq7bln4rhzjeb6z5jglvpqke
On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications
2014
Analog Integrated Circuits and Signal Processing
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
This work presents a technique for the onchip generation of analog sinusoidal signals with high spectral quality and reduced circuitry resources. ...
An integrated prototype designed in a 180nm CMOS technology is presented in order to show the feasibility of the technique. Results obtained from the prototype show a THD around −80dB. ...
complex mixed-signal electronics systems consisting of tightly integrated analog, mixed-signal, RF, and digital circuitry onto a single IC substrate. ...
doi:10.1007/s10470-014-0456-0
fatcat:ydv4aqoonnhs3ks5quot5hmd2a
2003 technology roadmap for semiconductors
2004
Computer
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
These models support extrapolation of future technology requirements for basic circuit fabricsprocessor, analog/mixed-signal, and embedded memory-as well as the SoC products they comprise. ...
The 2003 ITRS system drivers chapter presents an overarching SoC context for future semiconductor products, along with new discussions of technology requirements for analog/mixed-signal and embedded memory ...
Acknowledgments We acknowledge the efforts of the many individuals who contributed to making the 2003 edition of The International Technology Roadmap for Semiconductors a successful endeavor. ...
doi:10.1109/mc.2004.1260725
fatcat:eqstk5zzbzfkbl6upd2jjc4f4m
A Multi-objective Simulation Based Tool: Application to the Design of High Performance LC-VCOs
[chapter]
2013
IFIP Advances in Information and Communication Technology
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
In the analog, mixed signal and radio-frequency (AMS/RF) domains, circuit optimization tools have demonstrated their usefulness in addressing design problems taking into account downscaling technological ...
A CMOS LC-VCO circuit is presented to show the viability of this tool. ...
Introduction Analog, mixed signal and radio-frequency (AMS/RF) circuit design are becoming more and more complex; there is a pressing need for Electronic Design Automation (EDA) to meet the time to market ...
doi:10.1007/978-3-642-37291-9_49
fatcat:nnti2pp7sfgtlfhfyeha4shkbq
Analog and Mixed Signal Test Method based on OBIST Technique
2015
International Journal of Computer Applications
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf.
This method is built-in self test method appropriate for functional and structural testing of analog and mixed signal circuit. In test mode, the test circuit is converted into an oscillator. ...
Therefore in this test technique, the test vector generation drawbacks are eliminated and also the test time is reduced because limited number of oscillation frequencies is evaluated for each test circuit ...
BIST is a design process that provides the capability of solving many of the problems otherwise they can be encountered in testing analog, mixed-signal or digital systems. ...
doi:10.5120/19187-0684
fatcat:oetlraypzvhkhb7b2ix5mcwjlq
System-on-Chip: Reuse and Integration
2006
Proceedings of the IEEE
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
The concept of reuse can be carried out at the block, platform, or chip levels, and involves making the IP sufficiently general, configurable, or programmable, for use in a wide range of applications. ...
Design-for-test methodologies are also described, along with verification issues that must be addressed when integrating reusable components. ...
Acknowledgment The authors wish to thank their students and research engineers for the significant contributions to the work at the System-on-Chip Research Laboratory at the University of British Columbia ...
doi:10.1109/jproc.2006.873611
fatcat:tfwuk4abpjemfec6aswc23orfu
The GBT-SCA, a radiation tolerant ASIC for detector control and monitoring applications in HEP experiments
2015
Journal of Instrumentation
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf.
This work presents the GBT-SCA architecture, the ASIC interfaces, the data transfer protocol, and its integration with the GBT optical link. ...
The future upgrades of the LHC experiments will increase the beam luminosity leading to a corresponding growth of the amounts of data to be treated by the data acquisition systems. ...
Acknowledgments The authors would like to thank the members of the MEDIPIX collaboration for their contribution of IP blocks for the implementation of the DAC circuitry and specially X. ...
doi:10.1088/1748-0221/10/03/c03034
fatcat:jukxg7f2qve73m3lh23webntpa
Optimized Test compression bandwidth management for Ultra-large-Scale System-on-Chip Architectures performing Scan Test Bandwidth Management
2016
International Journal Of Engineering And Computer Science
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf.
and application-specific markets. ...
This paper introduces several test logic architectures that facilitate preemptive test scheduling for SoC circuits with embedded deterministic test-based test data compression. ...
These designs can include a variety of digital, analog, mixed-signal, infrastructure to unleash full multicore entitlement. ...
doi:10.18535/ijecs/v5i10.36
fatcat:ds2yquorzzembhf2hbfmfbzwz4
A new methodology for concurrent technology development and cell library optimization
1999
Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2006; you can also visit the original URL.
The file type is application/pdf.
We demonstrate several examples of Circuit Surfer applications to cell library design to optimize such objective functions as performance, cell area or yield. ...
This paper focuses on our approach for concurrent development of new technologies and optimization of cell libraries for these technologies. ...
The first two examples are a NOR gate and a AND-OR multiplexer from a digital library, the third example is a simple operational transconductance amplifier, which represents a cell in an analog/mixed-signal ...
doi:10.1109/icvd.1999.745118
dblp:conf/vlsid/ChewSCMS99
fatcat:gncaatiu5bgzfhwp3hhsa2owqi
« Previous
Showing results 1 — 15 out of 91 results