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Hermes
2011
Proceedings of the 48th Design Automation Conference on - DAC '11
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In this work, we propose a novel integrated CPU/GPU microarchitecture, Hermes, for QoS-aware high speed routing. ...
With the constantly increasing Internet traffic and fast changing network protocols, future routers have to simultaneously satisfy the requirements for throughput, QoS, flexibility, and scalability. ...
Conclusion and Future Work In this work, we proposed an integrated CPU/GPU microarchitecture with a QoS-aware GPU scheduling mechanism for accelerating IP routing processing. ...
doi:10.1145/2024724.2024953
dblp:conf/dac/ZhuDC11
fatcat:rdj7mfj57bhyjgg6vt6qzcshhe
Low power network on chip architectures: A survey
2020
Computer Science and Information Technologies
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Mostly communication now days is done through SoC (system on chip) models so, NoC (network on chip) architecture is most appropriate solution for better performance. ...
This research mainly focusses on state-of-the-art methods for designing NoC architecture and techniques to reduce power consumption in those architectures like, network architecture, network links between ...
Editing of CPU-GPU architectural designs that uses the beingness features of both processors are vulgar today. ...
doi:10.11591/csit.v2i3.p158-168
fatcat:rzmirvcyxfao7pu3k2nxsjmhzy
System Architecture Designs for Secure, Flexible and Openly-Accessible Enclave Computing
2022
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., Trusted Platform Modules (TPMs) or smart cards, enclave architectures are deeply integrated into the main processor and thus can utilize the full computational power of the processor while still reducing ...
implement and evaluate multiple novel enclave architectures and security extensions which contribute significantly to enclave computing research by tackling multiple research challenges, namely i) providing an ...
Acknowledgments
Acknowledgments We thank our anonymous reviewers for their valuable and constructive feedback. ...
doi:10.26083/tuprints-00021487
fatcat:kmbfkbzolrhhdgexphbkvk2nyu