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A wide-range and fast-locking all digital SARDLL for DVFS SoCs
2015
IEICE Electronics Express
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A wide-range and fast-locking all digital successive approximation register-controlled delay-locked loop (SARDLL) is presented for dynamic voltage/frequency scaling (DVFS) system-on-chips (SoCs). ...
The proposed SARDLL eliminates the harmonic lock problem and zero-delay trap problem by using the improved resettable digitally controlled delay line (DCDL) and shortens the lock time by adopting the 2 ...
The cell-based digital IC design flow is demonstrated to design a SAR-based ADDLL successively. Therefore, a lot of man hours are saved in the design phase compared with the full-custom design flow. ...
doi:10.1587/elex.12.20150284
fatcat:mp3q5yochrbtpdnk7coh4ylcea
Distribution and frequency of VKORC1 sequence variants conferring resistance to anticoagulants in Mus musculus
2011
Pest Management Science
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A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
Julius Kühn-Institut, Federal Research Centre for cultivated plants (JKI) The Julius Kühn-Institut is both a research institution and a higher federal authority. ...
concepts for plant cultivation as a whole, ranging from plant production to plant care and plant usage. ...
Acknowledgements The data from the field trials used in the computer modelling were kindly provided by the Rodenticide Resistance Action Committee and Syngenta AG. ...
doi:10.1002/ps.2254
pmid:21898757
fatcat:klcfi2vjqbhqzdcui3xxmwhmoy