A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
Filters
System architecture for 3GPP LTE modem using a programmable baseband processor
2009
2009 International Symposium on System-on-Chip
Preserved Fulltext
This paper presents the system architecture of an LTE modem based on a programmable baseband processor. ...
3G evolution towards HSPA and LTE is ongoing which will substantially increase the throughput with higher spectral efficiency. ...
The SIMT architecture utilizes multiple complex valued SIMD execution clusters such as complex MACs and complex ALUs. ...
doi:10.1109/socc.2009.5335662
dblp:conf/issoc/WuELNTA09
fatcat:vrjjfrpwxfex7epmiumfpsk3gq
System Architecture for 3GPP-LTE Modem using a Programmable Baseband Processor
2010
International Journal of Embedded and Real-Time Communication Systems
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
This paper presents the system architecture of an LTE modem based on a programmable baseband processor. ...
3G evolution towards HSPA and LTE is ongoing which will substantially increase the throughput with higher spectral efficiency. ...
The SIMT architecture utilizes multiple complex valued SIMD execution clusters such as complex MACs and complex ALUs. ...
doi:10.4018/jertcs.2010070103
fatcat:ewcrun3tmnboxobmasadsh3qnu
State of the art baseband DSP platforms for Software Defined Radio: A survey
2011
EURASIP Journal on Wireless Communications and Networking
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
This article presents an overview of current platforms and analyzes the related architectural choices, the current issues in SDR, as well as potential future trends. ...
Software Defined Radio (SDR) is an innovative approach which is becoming a more and more promising technology for future mobile handsets. ...
The mapping of a 20 MHz 2 × 2 MIMO-OFDM transmit and receive baseband functionality is detailed as an application case study, achieving 100 Mbps+ throughput with an average consumption of 220 mW [36] ...
doi:10.1186/1687-1499-2011-5
fatcat:apmz6jd4cbdcrpb76qnungmirq
Vector Processing as an Enabler for Software-Defined Radio in Handheld Devices
2005
EURASIP Journal on Advances in Signal Processing
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
A heterogeneous hardware architecture with the programmable vector processor EVP as key component can support WLAN, UMTS, and other standards. ...
A detailed rationale for the EVP architecture, based on the analysis of a number of key algorithms, as well as implementation and benchmarking results are described. ...
ACKNOWLEDGMENT The contributions of Srinivasan Balakrishnan, Nur Engin, Rick Nas, and Rob Takken (all with Philips Research Labs), and of Wim Kloosterhuis, Jean Paul Smeets, and Mahima Smriti (all with ...
doi:10.1155/asp.2005.2613
fatcat:a75mf7gqkjha5l7wcu5qqinsfa
IEEE 802.11AC MIMO transmitter baseband processing on customized VLIW processor
2014
2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
This paper presents a software-based implementation for the MIMO transmitter baseband processing conforming to the IEEE802.11ac standard on a DSP core with vector extensions. ...
The implementation is done for the frequency-domain processing and real-time operation has been achieved when running at a clock frequency of 500MHz. ...
This DSP core is a 4-issue VLIW processor and has support for vector operations with the aid of a 16-way SIMD ALU engine and 32-way MAC SIMD engine. ...
doi:10.1109/icassp.2014.6855058
dblp:conf/icassp/AghababaeetafreshiLSVT14
fatcat:vteugfbg5ffnnjuzzevqnqln64
Implementation Approaches Trade-Offs for WiMax OFDM Functions on Reconfigurable Platforms
2010
ACM Transactions on Reconfigurable Technology and Systems
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
The custom RTL approach showed the ability of a medium size FPGA to accommodate the design with only 50% occupation rate. The AccelDSP approach showed an area overhead of 10%. ...
This thesis investigates three approaches to implement the OFDM functions of the fixed-WiMAX standard on reconfigurable platforms. ...
In [23], Ebeling et al. implemented an OFDM transceiver on a reconfigurable architecture (RaPiD), and compared the cost and performance with other approaches; ASIC, DSP and FPGA-based, through estimation ...
doi:10.1145/1839480.1839482
fatcat:bgnljutmljdcpihgcso5p7cpae
The M2DC Project: Modular Microserver DataCentre
2016
2016 Euromicro Conference on Digital System Design (DSD)
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf.
Nevertheless, every application field introduces special requirements to the used computational architecture. ...
The key advantage is the combination of software-like flexibility with the performance otherwise common to hardware. ...
With the introduction of PCIe hard-macros within the FPGA fabric an integration in a common server infrastructure can be achieved which allows an on-time reconfigurable architecture. ...
doi:10.1109/dsd.2016.76
dblp:conf/dsd/CecowskiAOKBCKP16
fatcat:bu4nbkqaejebjafrotibui6mkq
Platforms and testbeds for experimental evaluation of cognitive ad hoc networks
2010
IEEE Communications Magazine
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
AeMB is a 32-bit reduced instruction set computer (RISC) architecture soft processor core with 32 generalpurpose registers, an arithmetic logic unit (ALU), and an instruction set which is very similar ...
to the RISC-based DLX architecture. ...
doi:10.1109/mcom.2010.5560593
fatcat:v3ttlulikfajbfm67gnx3u6fwi
Cross-Layer Optimization for Power-Efficient and Robust Digital Circuits and Systems
[article]
2017
arXiv
pre-print
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
With the increasing digital services demand, performance and power-efficiency become vital requirements for digital circuits and systems. ...
Applications like Massive MIMO systems are robust against lower level errors, thanks to the intrinsically redundant antennas. ...
The digital modem is split in the outer modem (processing information bits through channel coding/decoding) and the inner modem (in multi-carrier systems performing frequency-domain operations such as ...
arXiv:1712.03948v1
fatcat:b564kq3gkjhwfpgtjenzgs23em
Design methodology for memory-efficient multi-standard baseband processors
2005 Asia-Pacific Conference on Communications
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2006; you can also visit the original URL.
The file type is application/pdf.
base architectures maintaining a low area and clock rate while also maintaining flexibility and processing capability. ...
carrier modulation with the same processing device. ...
However in OFDM systems, the symbols are recreated in the frequency
domain. The conversion from time domain to frequency domain is per-
formed by an FFT. ...
doi:10.1109/apcc.2005.1554012
fatcat:zhvkuc7q2fcndgb3yg2qpwi5im