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Subchannel Scheduling for Shared Optical On-chip Buses
2017
2017 IEEE 25th Annual Symposium on High-Performance Interconnects (HOTI)
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We present both a distributed and a centralized bus arbitration scheme and show that both can be implemented with low overheads. ...
In this paper, we propose an efficient subchannel scheduling algorithm that aims to minimize the number of bus utilization cycles by assigning sender-receiver pairs both to subchannels and time slots. ...
ACKNOWLEDGEMENTS This research was conducted with support from the European Union's Horizon 2020 research and innovation programme under grant agreement No 671553 (ExaNeSt). ...
doi:10.1109/hoti.2017.18
dblp:conf/hoti/WernerNL17
fatcat:gundffw4zje3boornwtwjo32hq
FOS: a low-power cache organization for multicores
2019
Journal of Supercomputing
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Experimental results show that FOS achieves significant energy savings on both static and dynamic energy over conventional cache organizations with the same storage capacity. ...
FOS static energy savings are as much as 60% over an electrically-connected shared cache; these savings grow up to 75% compared to optically-connected baselines. ...
First, a sender node must get access to the channel, which is granted by an arbitration logic. ...
doi:10.1007/s11227-019-02858-x
fatcat:qs5rpfaz55cctpahwyjgrkqd7i
Techniques for fast, energy efficient on-die global communication
2018
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The file type is application/pdf.
This work analyzes the advantages and pitfalls of implementing asynchronous channel protocols for communication over long distances. ...
We demonstrate a method that supports end-to-end communication across links with arbitrarily large latency, without limiting the bandwidth, so long as line variation can be reliably controlled. ...
On-chip networks are required to be light-weight due to the limited power and area budgets. ...
doi:10.26053/0h-27mm-6rg0
fatcat:4n7vyrrrnrbptcmhkchnn7z3oy