Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
×
We propose a radiation-hardened flip-flop minimizing area, delay, and power overheads with 1/100 lower \alpha -SER in a 130 nm bulk process. The radiation hardness is achieved by adding series transistors and wires with only less than 14% area, 7% delay, and 12% power overheads in order to increase the critical charge.
Radiation Hardened Flip-Flops Minimizing Area, Power, and Delay Overheads with 1/100 Lower α-SER in a 130 nm Bulk Process ... To read the full-text of this ...
Abstract—We examined the radiation hardness of the several types of flip-flops fabricated in a 130 nm bulk process by alpha-.
Radiation Hardened Flip-Flops Minimizing Area, Power, and Delay Overheads with 1/100 Lower α-SER in a 130 nm Bulk Process. Conference Paper. Sep 2022.
Flip-Flops Minimizing Area, Power, and Delay Overheads with 1/100. Lower α-SER in a 130 nm Bulk Process”, 2022 IEEE 28th International. Symposium on On-Line ...
Radiation Hardened Flip-Flops Minimizing Area, Power, and Delay Overheads with 1/100 Lower α-SER in a 130 nm Bulk Process. IOLTS 2022: 1-5. [c44]. view.
Sep 27, 2023 · The DICE structure D flip-flop has a smaller propagation delay and better SEU hardening ability, but it will bring a larger area overhead.
Radiation Hardened Flip-Flops Minimizing Area, Power, and Delay Overheads with 1/100 Lower α-SER in a 130 nm Bulk Process. Ryuichi Nakajima, Kazuya Ioki, Jun ...
Radiation Hardened Flip-Flops Minimizing Area, Power, and Delay Overheads with 1/100 Lower α-SER in a 130 nm Bulk Process. IOLTS 2022: 1-5; 2021. [j10]. view.
Sep 14, 2022 · David Hely. Radiation Hardened Flip-Flops Minimizing Area, Power, and Delay Overheads with 1/100 Lower α-SER in a 130 nm Bulk Process ...