In this work, we propose a novel integrated CPU/GPU microarchitecture, Hermes, for QoS-aware high speed routing. We also develop a new thread scheduling ...

Jun 5, 2011 · In this work, we propose a novel integrated CPU/GPU microarchitecture, Hermes, for QoS-aware high speed routing. We also develop a new thread ...

Hermes: An Integrated CPU/GPU Microarchitecture for IP. Routing. Yuhao Zhu. Department of Electrical and Computer. Engineering. The University of Texas at ...

This work proposes a novel integrated CPU/GPU microarchitecture, Hermes, for QoS-aware high speed routing, and develops a new thread scheduling mechanism, ...

Hermes: An Integrated CPU/GPU Microarchitecture for IP. Routing. Yuhao Zhu. Department of Electrical and Computer. Engineering. The University of Texas at ...

Mechanism. ❑ One GPU thread for one packet. ❑ CPU passes #available packets to GPU through Task FIFO. ❑ GPU monitors the FIFO and starts processing ...

In this work, we propose a novel integrated CPU/GPU microarchitecture, Hermes, for QoS-aware high speed routing. We also develop a new thread schedulin...

Jul 23, 2019 · Bibliographic details on Hermes: an integrated CPU/GPU microarchitecture for IP routing.

Jul 25, 2014 · ... Hermes, an integrated CPU/GPU, shared memory microarchitecture that is enhanced with an adaptive warp issuing mechanism for IP packet processing.