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"Formal Verification of Synthesized Analog Designs."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Abhijit Ghosh, Ranga Vemuri (1999)

Trier

Dagstuhl

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DOI: 10.1109/ICCD.1999.808362

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Abhijit Ghosh, Ranga Vemuri:
Formal Verification of Synthesized Analog Designs. ICCD 1999: 40-45

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last updated on 2023-03-23 23:59 CET by the dblp team

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