Abstract
Nanophontonic networks, a potential candidate for future networks on-chip, have been challenged for their reliability due to several device-level limitations. One of the main issues is that fabrication errors (a.k.a. process variations) can cause devices to malfunction, rendering communication unreliable. For example, microring resonator, a preferred optical modulator device, may not resonate at the designated wavelength under process variations (PV), leading to communication errors and bandwidth loss.
This paper proposes a series of solutions to the wavelength drifting problem of microrings and subsequent bandwidth loss problem of an optical network, due to PV. The objective is to maximize network bandwidth through proper arrangement among microrings and wavelengths with minimum power requirement. Our arrangement, called "MinTrim", solves this problem using simple integer linear programming, adding supplementary microrings and allowing flexible assignment of wavelengths to network nodes as long as the resulting network presents maximal bandwidth. Each step is shown to improve bandwidth provisioning with lower power requirement. Evaluations on a sample network show that a baseline network could lose more than 40% bandwidth due to PV. Such loss can be recovered by MinTrim to produce a network with 98.4% working bandwidth. In addition, the power required in arranging microrings is 39% lower than the baseline. Therefore, MinTrim provides an efficient PV-tolerant solution to improving the reliability of on-chip phontonics.
- J. Ahn et al. Devices and architectures for photonic chip-scale integration. Appl. Phy. A, 2009.Google Scholar
Cross Ref
- C. Batten. Designing nanophotonic interconnection networks. In Workshop on the Interaction between Nanopho-tonic Devices and Systems, 2010.Google Scholar
- C. Batten et al. Building manycore processor-to-dram networks with monolithic silicon photonics. In Hot Interconnects, pages 21--30, 2008. Google Scholar
Digital Library
- Beamer et al. Re-architecting dram memory systems with monolithically integrated silicon photonics. In ISCA, pages 129--140, 2010. Google Scholar
Digital Library
- M. Berkelaar et al. Lp solve: Open source (mixed-integer) linear programming system (2007). http://lpsolve.sourceforge.net/5.5/.Google Scholar
- Y. Cao and L. T. Clark. Mapping statistical process variations toward circuit performance variability: An analytical modeling approach. In DAC, pages 658--663, 2005. Google Scholar
Digital Library
- Cianchetti et al. Phastlane: a rapid transit optical routing network. In ISCA, pages 441--450, 2009. Google Scholar
Digital Library
- Dokania et al. Analysis of challenges for on-chip optical interconnects. In GLSVLSI, 2009. Google Scholar
Digital Library
- R. Fourer et al. AMPL: A Modeling Language for Mathematical Programming, 2nd ed. Duxbury Press Publishing Company, 2002.Google Scholar
- M. Georgas et al. Addressing link-level design tradeoffs for integrated photonic interconnects. In Custom Integrated Circuits Conference, pages 1--8, 2011.Google Scholar
Cross Ref
- H. Haeiwa et al. Wide range center wavelength trimming of vertically coupled microring resonator filter by direct uv irradiation to sin ring core. IEEE Photonics Technology Letters, 16:135--137, 2004.Google Scholar
Cross Ref
- A. Joshi et al. Silicon-photonic clos networks for global on-chip communication. In NOCS, pages 124--133, 2009. Google Scholar
Digital Library
- J. Karttunen et al. Loading effects in deep silicon etching. In International Society of Optical Engineering, volume 4174, pages 90--97, 2000.Google Scholar
- N. Kirman et al. Leveraging optical technology in future bus-based chip multiprocessors. In MICRO, pages 492--503, 2006. Google Scholar
Digital Library
- N. Kirman and J. F. Martínez. A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing. In ASPLOS, pages 15--28, 2010. Google Scholar
Digital Library
- N. Kobayashi et al. Uv trimming of polarization-independent microring resonator by internal stress and temperature control. Optics Express, 18:906--916, 2010.Google Scholar
Cross Ref
- B. R. Kock et al. Mode-locked silicon evanescent lasers. Optics Express, 15(18), 2007.Google Scholar
Cross Ref
- P. Koka et al. Silicon-photonic network architectures for scalable, power-efficient multi-chip systems. SIGARCH Comput. Archit. News, 38, 2010. Google Scholar
Digital Library
- G. Kurian et al. Atac: a 1000--core cache-coherent processor with on-chip optical network. In PACT, pages 477--488, 2010. Google Scholar
Digital Library
- Z. Li et al. Reliability modeling and management of nanophotonic on-chip networks. IEEE TVLSIS, 20:98--111, 2010. Google Scholar
Digital Library
- A. Liu et al. A high-speed silicon optical modulator based on a metal-oxide-semiconductor capacitor. Nature, 427:615--618, 2004.Google Scholar
Cross Ref
- S. R. Nassif. Modeling and forecasting of manufacturing variations. In ASPDAC, pages 145--149, 2001. Google Scholar
Digital Library
- Y. Nasu et al. Birefringence suppression of uv-induced refractive index with grooves in silica-based planar lightwave circuits. Electronics Letters, 41:1118--1119, 2005.Google Scholar
Cross Ref
- C. Nitta et al. Addressing system-level trimming issues in on-chip nanophotonic networks. In HPCA, pages 122--131, 2011. Google Scholar
Digital Library
- C. Nitta et al. Resilient microring resonator based photonic networks. In MICRO, pages 95--104, 2011. Google Scholar
Digital Library
- J. Orcutt et al. Nanophotonic integration in state-of-the-art cmos foundries. Optics Express, 19:2335--2346, 2011.Google Scholar
Cross Ref
- Y. Pan et al. Firefly: Illuminating future network-on-chip with nanophotonics. In ISCA, pages 429--440, 2009. Google Scholar
Digital Library
- Y. Pan et al. Flexishare: Channel sharing for an energy-efficient nanophotonic crossbar. In HPCA, pages 1--12, 2010.Google Scholar
Cross Ref
- S. Postnikov et al. Critical dimension control in optical lithography. Microelectronic Engineering, 69(2--4):452--458, 2003. Google Scholar
Digital Library
- C. Qiu et al. Wavelength tracking with thermally controlled silicon resonators. Optics Express, 19:5143--5148, 2011.Google Scholar
Cross Ref
- G. T. Reed et al. Silicon optical modulators. Nature Photonics, 4:518 -- 526, 2010.Google Scholar
- S. Sarangi et al. Varius: A model of process variation and resulting timing errors for microarchitects. IEEE Transactions on Semiconductor Manufacturing, 21(1):3 --13, 2008.Google Scholar
Cross Ref
- J. Schrauwen et al. Trimming of silicon ring resonator by electron beam induced compaction and strain. Optics Express, 16:3738--3743, 2008.Google Scholar
Cross Ref
- S. K. Selvaraja. Wafer-Scale Fabrication Technology for Silicon Photonic Integrated Circuits. PhD thesis, Ghent University, Feb. 2011.Google Scholar
- N. Sherwood-Droz et al. Device guidelines for wdm interconnects using silicon microring resonators. In Workshop on the Interaction between Nanophotonic Devices and Systems, 2010.Google Scholar
- S. Ueno et al. High uv sensitivity of sion film and its application to center wavelength trimming of microring resonator filter. IEICE Transactions on Electron, E88--C(5):998--1004, 2005.Google Scholar
- D. Vantrease et al. Corona: System implications of emerging nanophotonic technology. In ISCA, pages 153--164, 2008. Google Scholar
Digital Library
- D. Vantrease et al. Light speed arbitration and flow control for nanophotonic interconnects. In MICRO, pages 304--315, 2009. Google Scholar
Digital Library
- D. Vantrease et al. Atomic coherence: Leveraging nanopho-tonics to build race-free cache coherence protocols. In HPCA, pages 132--143, 2011. Google Scholar
Digital Library
- K. Williams and P. Watts. Optical interconnects for nocs and off-chip communications. Tutorial, NOCS, 2011.Google Scholar
- D. Xu. Polarization control in silicon photonic. Topics in Applied Physics, pages 31--70, 2011.Google Scholar
- Q. Xu et al. Micrometer-scale silicon electro-optic modulator. Nature, pages 325--327, 2005.Google Scholar
- Q. Xu et al. 12.5 gbit/s carrier-injection-based silicon microring silicon modulators. Optics Express, pages 430--436, 2007.Google Scholar
- Q. Xu et al. Silicon microring resonators with 1.5-μm radius. Optics Express, pages 4309--4315, 2008.Google Scholar
- Y. Xu et al. A composite and scalable cache coherence protocol for large scale cmps. In ICS, pages 285--294, 2011. Google Scholar
Digital Library
- S. Yoo. Cmos-compatible silicon photonic integrated systems in future computing and communication systems. In OptoeElectronics and Communications Conference, pages 510--511, 2010.Google Scholar
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